| Message ID | 20241004053341.5726-4-manali.shukla@amd.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add support for the Bus Lock Threshold | expand |
x86 (lowercase 'x') On Fri, Oct 04, 2024, Manali Shukla wrote: > Add a note about behavioral difference for KVM_EXIT_X86_BUS_LOCK > between AMD CPUs and Intel CPUs in KVM_CAP_X86_BUS_LOCK_EXIT > capability documentation. This belongs in the previous patch, especially if patch 2 is split into arch collateral and KVM implementation. The KVM changes are small enough that I don't see a reason to separate the documentation from the code. And there will likely be enough subtleties to the code that we'll want a bit more documentation.
diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst index e32471977d0a..49465323dc62 100644 --- a/Documentation/virt/kvm/api.rst +++ b/Documentation/virt/kvm/api.rst @@ -7884,6 +7884,10 @@ Note! Detected bus locks may be coincident with other exits to userspace, i.e. KVM_RUN_X86_BUS_LOCK should be checked regardless of the primary exit reason if userspace wants to take action on all detected bus locks. +Note! On AMD CPUs, the bus lock exit to user space occurs with RIP pointing at +the offending instruction. In contrast, on Intel CPUs, the RIP points to the +instruction right after the guilty one after the bus lock exit to user space. + 7.23 KVM_CAP_PPC_DAWR1 ----------------------
Add a note about behavioral difference for KVM_EXIT_X86_BUS_LOCK between AMD CPUs and Intel CPUs in KVM_CAP_X86_BUS_LOCK_EXIT capability documentation. Signed-off-by: Manali Shukla <manali.shukla@amd.com> --- Documentation/virt/kvm/api.rst | 4 ++++ 1 file changed, 4 insertions(+)