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Wed, 30 Oct 2024 14:35:54 -0700 From: Nicolin Chen To: , , CC: , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v6 10/10] Documentation: userspace-api: iommufd: Update vDEVICE Date: Wed, 30 Oct 2024 14:35:36 -0700 Message-ID: <637d97557328ee158ac2cc9039bde9bd114629bf.1730313494.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000066E6:EE_|MW6PR12MB9020:EE_ X-MS-Office365-Filtering-Correlation-Id: dd0e8c53-8138-42e2-7bdc-08dcf92ae375 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|7416014|376014|36860700013; X-Microsoft-Antispam-Message-Info: 03v7LP/56+g95H//dcCIBL5H1NAcJRLmZN04rGbbgj6xyPqvMZlBnMVL9a1dMohmZYFoFdb1/p+N0eG+DF+RbMVGwId0Oa1pfd9z+STqUR3QKyzxE2euW8PZ1mtB2WaRX2CH/rvrBzAH1DUykoIY8pSuZf45/mki/6snhME2Uw9rlRQ0J+ck5+r+gwardvQPXUS4uw0s8JFpOkIbZnbDiAU+sHt7U8CRYD9r2Y7xz16ZMczILhtyz1zcuoUh/QRJV5mm5wVWkEXhK5SmiUHVL/OZ55qDwB8WT8wzo0AjyG3KTmy8IR69pfBRGXD2FBMKolRJMjqzgwXfRkomVrRoAr3DspT/sZFEiKrkraS6EJo3oxSz1kW15LB9i5vZiXiNUY6qeXbJiHRcZB9EIQQktXlCmvAzvcLOveJS5hah6yOaqYoUiL2UBTiRUYA6+bUhZfKsWK+gS5flHa+Y5uHCu4wKaMlmcXGRmgBAjSllYjFBbWGvulpr6Sy9ssZp58uurjXU1/JDXGb6Zm3L0rfjVMsTxq54Ru5MXKjBUVUzDVbs2EZy81Ab4ESf/ufvgAc6OZh2suamm5Y3jE216lp2zlc9mgIDAHdXAJU9Thi8sERMBbUYN1c7Z0kZSzOwLbGD1yXYXLKGksoi+gecUDAlipr27Jk9b0z9qyEY/yPxEHwkRgZswFbKoDOqz2W6QwkKaMH+iB++CZ1NpQ3TgVAtGrYadpZICyPZ2FZQMWTxTqojwGN2xxVRYXt1FSTF6UJbsnlkzvq+MWn0BuAX/2IJJ91tk6PY2D2LYTrymfK14d/QVwfjwGKbgV1AOywMZ+sYIMy6MfIuSTr6izJqEqMCmjPAffX7sS98JLMySwXkdWH/K6s/b8BFJUxxn37CokQlWsrSEU4gR4gqs1XdgD+b/zHzRlfIN61mbWZvhXuworavjd/IkQNAayWEnCaUiizyJpdsqN/5zwc/p3qYBqEa7DLNYFTqyzgFyadYqzWQpXCz3ehblUG+nSP9qXOZcgyY9eWq5xCj54qYtILujQ1aPTk18+tHwgM/+030c1fZu4abP9xcIy7upokBsFCYzh+Dfl0Ouew+d4IxhYrs2C2BtPeEs3impyTyL2k/dMpPAce5XYrbYiJo85uOYCnwcaHXkc07TkihujrVwnCOnwOcsPUxLdRFdbu7RYvZ6dexU2t/95BL4Cv8m4RNetWAllQVI5OzReKAWYxAa+T9tDZ2xFOSy+Wa3fXVP1MOzC37O1OwlcstWn+QqQgP5rBLHhsg+tLECpwi+G96U6GJePk3o8dyj8hH+8SPJZqy6428UmIlWq1XZq9Cu03kKb1LU28L0UEpyadXHR3kuClOJDv5iKPL7OXO4Sh7Z+I4SIUtTgHDKRjWHpULCKWIajT2MX3+diyhfjhY/P+V9l4k7/nEFA== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(7416014)(376014)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Oct 2024 21:36:17.8900 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dd0e8c53-8138-42e2-7bdc-08dcf92ae375 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000066E6.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW6PR12MB9020 With the introduction of the new object and its infrastructure, update the doc and the vIOMMU graph to reflect that. Reviewed-by: Jason Gunthorpe Reviewed-by: Kevin Tian Signed-off-by: Nicolin Chen --- Documentation/userspace-api/iommufd.rst | 41 +++++++++++++++++++------ 1 file changed, 32 insertions(+), 9 deletions(-) diff --git a/Documentation/userspace-api/iommufd.rst b/Documentation/userspace-api/iommufd.rst index a8b7766c2849..0ef22b3ca30b 100644 --- a/Documentation/userspace-api/iommufd.rst +++ b/Documentation/userspace-api/iommufd.rst @@ -94,6 +94,19 @@ Following IOMMUFD objects are exposed to userspace: backed by corresponding vIOMMU objects, in which case a guest OS would do the "dispatch" naturally instead of VMM trappings. +- IOMMUFD_OBJ_VDEVICE, representing a virtual device for an IOMMUFD_OBJ_DEVICE + against an IOMMUFD_OBJ_VIOMMU. This virtual device holds the device's virtual + information or attributes (related to the vIOMMU) in a VM. An immediate vDATA + example can be the virtual ID of the device on a vIOMMU, which is a unique ID + that VMM assigns to the device for a translation channel/port of the vIOMMU, + e.g. vSID of ARM SMMUv3, vDeviceID of AMD IOMMU, and vRID of Intel VT-d to a + Context Table. Potential use cases of some advanced security information can + be forwarded via this object too, such as security level or realm information + in a Confidential Compute Architecture. A VMM should create a vDEVICE object + to forward all the device information in a VM, when it connects a device to a + vIOMMU, which is a separate ioctl call from attaching the same device to an + HWPT_PAGING that the vIOMMU holds. + All user-visible objects are destroyed via the IOMMU_DESTROY uAPI. The diagrams below show relationships between user-visible objects and kernel @@ -133,16 +146,16 @@ creating the objects and links:: |____________| |____________| |______| _______________________________________________________________________ - | iommufd (with vIOMMU) | + | iommufd (with vIOMMU/vDEVICE) | | | - | [5] | - | _____________ | - | | | | - | |----------------| vIOMMU | | - | | | | | - | | | | | - | | [1] | | [4] [2] | - | | ______ | | _____________ ________ | + | [5] [6] | + | _____________ _____________ | + | | | | | | + | |----------------| vIOMMU |<---| vDEVICE |<----| | + | | | | |_____________| | | + | | | | | | + | | [1] | | [4] | [2] | + | | ______ | | _____________ _|______ | | | | | | [3] | | | | | | | | | IOAS |<---|(HWPT_PAGING)|<---| HWPT_NESTED |<--| DEVICE | | | | |______| |_____________| |_____________| |________| | @@ -215,6 +228,15 @@ creating the objects and links:: the vIOMMU object and the HWPT_PAGING, then this vIOMMU object can be used as a nesting parent object to allocate an HWPT_NESTED object described above. +6. IOMMUFD_OBJ_VDEVICE can be only manually created via the IOMMU_VDEVICE_ALLOC + uAPI, provided a viommu_id for an iommufd_viommu object and a dev_id for an + iommufd_device object. The vDEVICE object will be the binding between these + two parent objects. Another @virt_id will be also set via the uAPI providing + the iommufd core an index to store the vDEVICE object to a vDEVICE array per + vIOMMU. If necessary, the IOMMU driver may choose to implement a vdevce_alloc + op to init its HW for virtualization feature related to a vDEVICE. Successful + completion of this operation sets up the linkages between vIOMMU and device. + A device can only bind to an iommufd due to DMA ownership claim and attach to at most one IOAS object (no support of PASID yet). @@ -228,6 +250,7 @@ User visible objects are backed by following datastructures: - iommufd_hwpt_paging for IOMMUFD_OBJ_HWPT_PAGING. - iommufd_hwpt_nested for IOMMUFD_OBJ_HWPT_NESTED. - iommufd_viommu for IOMMUFD_OBJ_VIOMMU. +- iommufd_vdevice for IOMMUFD_OBJ_VDEVICE Several terminologies when looking at these datastructures: