From patchwork Tue Sep 18 01:45:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Niklas_S=C3=B6derlund?= X-Patchwork-Id: 10603653 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 776EA161F for ; Tue, 18 Sep 2018 01:50:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 69A112A6F8 for ; Tue, 18 Sep 2018 01:50:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5D90F2A722; Tue, 18 Sep 2018 01:50:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1783D2A6F8 for ; Tue, 18 Sep 2018 01:50:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728490AbeIRHUG (ORCPT ); Tue, 18 Sep 2018 03:20:06 -0400 Received: from bin-mail-out-05.binero.net ([195.74.38.228]:32843 "EHLO bin-mail-out-05.binero.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726382AbeIRHUG (ORCPT ); Tue, 18 Sep 2018 03:20:06 -0400 X-Halon-ID: 162244e6-bae5-11e8-ab18-005056917a89 Authorized-sender: niklas@soderlund.pp.se Received: from bismarck.berto.se (unknown [89.233.230.99]) by bin-vsp-out-01.atm.binero.net (Halon) with ESMTPA id 162244e6-bae5-11e8-ab18-005056917a89; Tue, 18 Sep 2018 03:49:44 +0200 (CEST) From: =?utf-8?q?Niklas_S=C3=B6derlund?= To: Kieran Bingham , Laurent Pinchart , Jacopo Mondi , linux-media@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, =?utf-8?q?Niklas_S=C3=B6derlund?= Subject: [PATCH 0/3] i2c: adv748x: add support for CSI-2 TXA to work in 1-, 2- and 4-lane mode Date: Tue, 18 Sep 2018 03:45:06 +0200 Message-Id: <20180918014509.6394-1-niklas.soderlund+renesas@ragnatech.se> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi, This series allows the TXA CSI-2 transmitter of the adv748x to function in 1-, 2- and 4- lane mode. Currently the driver fixes the hardware in 4-lane mode. The driver looks at the standard DT property 'data-lanes' to determine which mode it should operate in. Patch 1/3 adds the DT parsing and storing of the number of lanes. Patch 2/3 adds functionality for intercepting and injecting the requested number of lanes when writing the register for NUM_LANES for the TXA register 0x00. Lastly patch 3/3 fixes a type related to lane settings for TXB which is confusing (at lest to me) when reviewing the result of this series. Patch 1/3 and 2/3 could be squashed together but as the method in 2/3 is less then obvious since it intercepts the long tables of register writes I thought splitting them could ease review. The series is based on the latest media-tree master and is tested on Renesas M3-N in 1-, 2- and 4- lane mode. Niklas Söderlund (3): i2c: adv748x: store number of CSI-2 lanes described in device tree i2c: adv748x: configure number of lanes used for TXA CSI-2 transmitter i2c: adv748x: fix typo in comment for TXB CSI-2 transmitter power down drivers/media/i2c/adv748x/adv748x-core.c | 89 +++++++++++++++++++++--- drivers/media/i2c/adv748x/adv748x.h | 1 + 2 files changed, 81 insertions(+), 9 deletions(-)