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[2001:1c06:2302:5600:7555:cca3:bbc4:648b]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ac314a3fc0esm226008566b.137.2025.03.14.06.14.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Mar 2025 06:14:09 -0700 (PDT) From: Bryan O'Donoghue Subject: [PATCH v6 0/5] Add dt-bindings and dtsi changes for CAMSS on x1e80100 silicon Date: Fri, 14 Mar 2025 13:13:58 +0000 Message-Id: <20250314-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v6-0-edcb2cfc3122@linaro.org> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAJYr1GcC/52NTQ6CMBSEr0Le2mda+iO48h6GRYECL9HWtEhqS O9u5Qguv5nMfDtEG8hGuFY7BLtRJO8K6FMFw2LcbJHGwlCzWjHBBfYSH+TeCZ1NK9YKmcASj2s kTNw2jDOGg3nGiFwxPV1k34/CQDl8BTtROmT3rvBCcfXhc7g39Uv/0mylxEbqoTVatsI0t7I0w Z99mKHLOX8Bn977SuUAAAA= X-Change-ID: 20250313-b4-linux-next-25-03-13-dtsi-x1e80100-camss-1506f74bbd3a To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Foss , Todor Tomov , Mauro Carvalho Chehab , Konrad Dybcio Cc: Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, Bryan O'Donoghue , Vladimir Zapolskiy , Konrad Dybcio X-Mailer: b4 0.14.2 Changes in v6: - Removes 'A phandle to an OPP node describing' per Krzysztof's comment on patch #1 - Drops Fixes: from patch #1 - Krzysztof - The ordering of opp description MXC and MMXC is kept as it matches the power-domain ordering - Krzysztof/bod - Link to v5: https://lore.kernel.org/r/20250313-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v5-0-846c9a6493a8@linaro.org v5: - Picks up a Fixes: that is a valid precursor for this series - Vlad - Applies RB from Vlad - Drops "cam" prefix in interconnect names - Krzysztof/Vlad - Amends sorting of regs, clocks consistent with recent 8550 - Depeng/Vlad - Link to v4: https://lore.kernel.org/r/20250119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v4-0-c2964504131c@linaro.org v4: - Applies RB from Konrad - Adds the second CCI I2C bus to CCI commit log description. I previously considered leaving out the always on pins but, decided to include them in the end and forgot to align the commit log. - Alphabetises the camcc.h included in the dtsi. - Vlad - Link to v3: https://lore.kernel.org/r/20250102-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v3-0-cb66d55d20cc@linaro.org v3: - Fixes ordering of headers in dtsi - Vlad - Changes camcc to always on - Vlad - Applies RB as indicated - Krzysztof, Konrad - Link to v2: https://lore.kernel.org/r/20241227-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v2-0-06fdd5a7d5bb@linaro.org v2: I've gone through each comment and implemented each suggestion since IMO they were all good/correct comments. Detail: - Moves x1e80100 camcc to its own yaml - Krzysztof - csid_wrapper comes first because it is the most relevant register set - configuring all CSID blocks subordinate to it - bod, Krzysztof - Fixes missing commit log - Krz - Updates to latest format established @ sc7280 - bod - Includes CSID lite which I forgot to add @ v1 - Konrad, bod - Replaces static ICC parameters with defines - Konrad - Drops newlines between x and x-name - Konrad - Drops redundant iommu extents - Konrad - Leaves CAMERA_AHB_CLK as-is - Kronrad, Dmitry Link: https://lore.kernel.org/r/3f1a960f-062e-4c29-ae7d-126192f35a8b@oss.qualcomm.com - Interrupt EDGE_RISING - Vladimir - Implements suggested regulator names pending refactor to PHY API - Vladimir - Drop slow_ahb_src clock - Vladimir Link to v1: https://lore.kernel.org/r/20241119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v1-0-54075d75f654@linaro.org Working tree: https://git.codelinaro.org/bryan.odonoghue/kernel/-/tree/arm-laptop/wip/x1e80100-6.13-rc3 v1: This series adds dt-bindings and dtsi for CAMSS on x1e80100. The primary difference between x1e80100 and other platforms is a new VFE and CSID pair at version 680. Some minor driver churn will be required to support outside of the new VFE and CSID blocks but nothing too major. The CAMCC in this silicon requires two, not one power-domain requiring either this fix I've proposed here or something similar: https://lore.kernel.org/linux-arm-msm/bad60452-41b3-42fb-acba-5b7226226d2d@linaro.org/T/#t That doesn't gate adoption of the binding description though. A working tree in progress can be found here: https://git.codelinaro.org/bryan.odonoghue/kernel/-/tree/x1e80100-6.12-rc7+camss?ref_type=heads Signed-off-by: Bryan O'Donoghue --- Bryan O'Donoghue (4): dt-bindings: media: Add qcom,x1e80100-camss arm64: dts: qcom: x1e80100: Add CAMCC block definition arm64: dts: qcom: x1e80100: Add CCI definitions arm64: dts: qcom: x1e80100: Add CAMSS block definition Vladimir Zapolskiy (1): dt-bindings: clock: qcom,x1e80100-camcc: Fix the list of required-opps .../bindings/clock/qcom,x1e80100-camcc.yaml | 9 +- .../bindings/media/qcom,x1e80100-camss.yaml | 367 +++++++++++++++++++++ arch/arm64/boot/dts/qcom/x1e80100.dtsi | 352 ++++++++++++++++++++ 3 files changed, 724 insertions(+), 4 deletions(-) --- base-commit: 9fbcd7b32bf7c0a5bda0f22c25df29d00a872017 change-id: 20250313-b4-linux-next-25-03-13-dtsi-x1e80100-camss-1506f74bbd3a Best regards,