From patchwork Thu Oct 12 07:43:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Zapolskiy X-Patchwork-Id: 10001201 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8C21B602BF for ; Thu, 12 Oct 2017 07:44:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7EB6420090 for ; Thu, 12 Oct 2017 07:44:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 72F9428B7D; Thu, 12 Oct 2017 07:44:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 21D1620090 for ; Thu, 12 Oct 2017 07:44:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752752AbdJLHoC (ORCPT ); Thu, 12 Oct 2017 03:44:02 -0400 Received: from relay1.mentorg.com ([192.94.38.131]:44344 "EHLO relay1.mentorg.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752731AbdJLHoA (ORCPT ); Thu, 12 Oct 2017 03:44:00 -0400 Received: from nat-ies.mentorg.com ([192.94.31.2] helo=SVR-IES-MBX-04.mgc.mentorg.com) by relay1.mentorg.com with esmtps (TLSv1.2:ECDHE-RSA-AES256-SHA384:256) id 1e2Y9t-0000BR-Vj from Vladimir_Zapolskiy@mentor.com ; Thu, 12 Oct 2017 00:43:58 -0700 Received: from [137.202.108.198] (137.202.0.87) by SVR-IES-MBX-04.mgc.mentorg.com (139.181.222.4) with Microsoft SMTP Server (TLS) id 15.0.1263.5; Thu, 12 Oct 2017 08:43:53 +0100 Subject: Re: [PATCH v3 2/2] ARM: dts: tegra20: Add video decoder node To: Dmitry Osipenko , Thierry Reding , Jonathan Hunter , Greg Kroah-Hartman , Rob Herring , Mauro Carvalho Chehab , Stephen Warren References: CC: Dan Carpenter , , , , , From: Vladimir Zapolskiy Message-ID: <0b6150a7-5b2b-ca4d-eb34-b6614e4833df@mentor.com> Date: Thu, 12 Oct 2017 10:43:42 +0300 User-Agent: Mozilla/5.0 (X11; Linux i686; rv:45.0) Gecko/20100101 Icedove/45.2.0 MIME-Version: 1.0 In-Reply-To: X-Originating-IP: [137.202.0.87] X-ClientProxiedBy: svr-ies-mbx-01.mgc.mentorg.com (139.181.222.1) To SVR-IES-MBX-04.mgc.mentorg.com (139.181.222.4) Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hello Dmitry, On 10/11/2017 11:08 PM, Dmitry Osipenko wrote: > Add a device node for the video decoder engine found on Tegra20. > > Signed-off-by: Dmitry Osipenko > --- > arch/arm/boot/dts/tegra20.dtsi | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi > index 7c85f97f72ea..1b5d54b6c0cb 100644 > --- a/arch/arm/boot/dts/tegra20.dtsi > +++ b/arch/arm/boot/dts/tegra20.dtsi > @@ -249,6 +249,23 @@ > */ > }; > > + vde@6001a000 { > + compatible = "nvidia,tegra20-vde"; > + reg = <0x6001a000 0x3D00 /* VDE registers */ > + 0x40000400 0x3FC00>; /* IRAM region */ this notation of a used region in IRAM is non-standard and potentially it may lead to conflicts for IRAM resource between users. My proposal is to add a valid device tree node to describe an IRAM region firstly, then reserve a subregion in it by using a new "iram" property. ----8<---- From: Vladimir Zapolskiy Date: Thu, 12 Oct 2017 10:25:45 +0300 Subject: [PATCH] ARM: tegra: add device tree node to describe IRAM on Tegra20 All Tegra20 SoCs contain 256KiB IRAM, which is used to store resume code and by a video decoder engine. Signed-off-by: Vladimir Zapolskiy --- arch/arm/boot/dts/tegra20.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) [snip] + vde@6001a000 { + compatible = "nvidia,tegra20-vde"; + reg = <0x6001a000 0x3d00>; /* VDE registers */ + iram = <&vde_pool>; /* IRAM region */ [snip] ----8<---- And finally in the driver you'll use genalloc API to access the IRAM region, for that you can find ready examples in the kernel source code. -- With best wishes, Vladimir diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 7c85f97f72ea..fd2843c90920 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -9,6 +9,14 @@ compatible = "nvidia,tegra20"; interrupt-parent = <&lic>; + iram@40000000 { + compatible = "mmio-sram"; + reg = <0x40000000 0x40000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x40000000 0x40000>; + }; + host1x@50000000 { compatible = "nvidia,tegra20-host1x", "simple-bus"; reg = <0x50000000 0x00024000>; ----8<---- Please add the change above to your next version of the series, or if you wish I can send it separately for review by Thierry. After applying that change you do define a region in IRAM for the exclusive usage by a video decoder engine and add an 'iram' property: ----8<---- diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index fd2843c90920..5133fbac2185 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -15,6 +15,11 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0 0x40000000 0x40000>; + + vde_pool: vde { + reg = <0x400 0x3fc00>; + pool; + }; }; host1x@50000000 {