From patchwork Wed Nov 28 19:09:24 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sylwester Nawrocki/Kernel \\(PLT\\) /SRPOL/Staff Engineer/Samsung Electronics" X-Patchwork-Id: 1818021 Return-Path: X-Original-To: patchwork-linux-media@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id DF15F3FC54 for ; Wed, 28 Nov 2012 19:09:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932221Ab2K1TJ5 (ORCPT ); Wed, 28 Nov 2012 14:09:57 -0500 Received: from mailout3.samsung.com ([203.254.224.33]:44087 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932209Ab2K1TJz (ORCPT ); Wed, 28 Nov 2012 14:09:55 -0500 Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0ME700LI6P8E8G40@mailout3.samsung.com> for linux-media@vger.kernel.org; Thu, 29 Nov 2012 04:09:54 +0900 (KST) X-AuditID: cbfee61a-b7fa66d0000004cf-76-50b661825f56 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 59.63.01231.28166B05; Thu, 29 Nov 2012 04:09:54 +0900 (KST) Received: from amdc1344.digital.local ([106.116.147.32]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0ME7006TUP7TOU90@mmp2.samsung.com> for linux-media@vger.kernel.org; Thu, 29 Nov 2012 04:09:54 +0900 (KST) From: Sylwester Nawrocki To: linux-media@vger.kernel.org Cc: sw0312.kim@samsung.com, kyungmin.park@samsung.com, a.hajda@samsung.com, Sylwester Nawrocki Subject: [PATCH RFC 07/12] s5p-csis: Enable only data lanes that are actively used Date: Wed, 28 Nov 2012 20:09:24 +0100 Message-id: <1354129766-2821-8-git-send-email-s.nawrocki@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-reply-to: <1354129766-2821-1-git-send-email-s.nawrocki@samsung.com> References: <1354129766-2821-1-git-send-email-s.nawrocki@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrAJMWRmVeSWpSXmKPExsVy+t9jQd2mxG0BBu+adC16NmxldWD0+LxJ LoAxissmJTUnsyy1SN8ugSvj6qV9jAVfuSrm7LnG2sA4jbOLkYNDQsBEYkWrVRcjJ5ApJnHh 3nq2LkYuDiGB6YwS9+b1MUE4K5gkbt48zQhSxSZgKNF7tA/MFhGQl3jSe4MNxGYWqJQ4OX82 E4gtLBAiseREL5jNIqAqcX7eVTCbV8BV4vLpbawQixUk5kyyAQlzCrhJnL/xAGykEFDJ5ytN TBMYeRcwMqxiFE0tSC4oTkrPNdQrTswtLs1L10vOz93ECPb3M6kdjCsbLA4xCnAwKvHwbrLc FiDEmlhWXJl7iFGCg1lJhPdWEFCINyWxsiq1KD++qDQntfgQozQHi5I4b7NHSoCQQHpiSWp2 ampBahFMlomDU6qB0dDyu7TpQu+3i+ZcDziZWrny936hbrUWyW8r0tTYJmyZM6cylHdqVnHJ 2v/9E9K9Cy69kY+/wbNi3U1F2YR9dzxtg1i1+r8+UdHV64mVtV/y3Z2zyn3Dq0e/Z9w5+WPt 3pVczduT9ohIe1hHbFJvTeouenX0xC6xe4UC2zxi+VbFz9+yO1DojxJLcUaioRZzUXEiAO0G iq7zAQAA Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Enable only MIPI CSI-2 data lanes at the DPHY that are actively used, rather than unmasking all unconditionally. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park --- drivers/media/platform/s5p-fimc/mipi-csis.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/media/platform/s5p-fimc/mipi-csis.c b/drivers/media/platform/s5p-fimc/mipi-csis.c index a6791b5..e979b6e 100644 --- a/drivers/media/platform/s5p-fimc/mipi-csis.c +++ b/drivers/media/platform/s5p-fimc/mipi-csis.c @@ -273,7 +273,8 @@ static void s5pcsis_reset(struct csis_state *state) static void s5pcsis_system_enable(struct csis_state *state, int on) { - u32 val; + struct s5p_platform_mipi_csis *pdata = state->pdev->dev.platform_data; + u32 val, mask; val = s5pcsis_read(state, S5PCSIS_CTRL); if (on) @@ -283,10 +284,11 @@ static void s5pcsis_system_enable(struct csis_state *state, int on) s5pcsis_write(state, S5PCSIS_CTRL, val); val = s5pcsis_read(state, S5PCSIS_DPHYCTRL); - if (on) - val |= S5PCSIS_DPHYCTRL_ENABLE; - else - val &= ~S5PCSIS_DPHYCTRL_ENABLE; + val &= ~S5PCSIS_DPHYCTRL_ENABLE; + if (on) { + mask = (1 << (pdata->lanes + 1)) - 1; + val |= (mask & S5PCSIS_DPHYCTRL_ENABLE); + } s5pcsis_write(state, S5PCSIS_DPHYCTRL, val); }