@@ -460,6 +460,13 @@ struct dvb_frontend *fc0012_attach(struct dvb_frontend *fe,
if (priv->cfg->loop_through)
fc0012_writereg(priv, 0x09, 0x6f);
+ /*
+ * TODO: Clock out en or div?
+ * For dual tuner configuration clearing bit [0] is required.
+ */
+ if (priv->cfg->clock_out)
+ fc0012_writereg(priv, 0x0b, 0x82);
+
memcpy(&fe->ops.tuner_ops, &fc0012_tuner_ops,
sizeof(struct dvb_tuner_ops));
@@ -41,6 +41,11 @@ struct fc0012_config {
* RF loop-through
*/
bool loop_through;
+
+ /*
+ * clock output
+ */
+ bool clock_out;
};
#if defined(CONFIG_MEDIA_TUNER_FC0012) || \
We need feed clock to slave demodulator at the very beginning in case of dual tuner configuration. I am not sure if that configuration changes clock output divider or enable clock output itself... Cc: Hans-Frieder Vogt <hfvogt@gmx.net> Signed-off-by: Antti Palosaari <crope@iki.fi> --- drivers/media/tuners/fc0012.c | 7 +++++++ drivers/media/tuners/fc0012.h | 5 +++++ 2 files changed, 12 insertions(+)