From patchwork Mon Jun 10 13:23:04 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arun Kumar K X-Patchwork-Id: 2697541 Return-Path: X-Original-To: patchwork-linux-media@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id EA3BCDF264 for ; Mon, 10 Jun 2013 13:02:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752553Ab3FJNCZ (ORCPT ); Mon, 10 Jun 2013 09:02:25 -0400 Received: from mailout2.samsung.com ([203.254.224.25]:53768 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751558Ab3FJNCY (ORCPT ); Mon, 10 Jun 2013 09:02:24 -0400 Received: from epcpsbgr2.samsung.com (u142.gpu120.samsung.co.kr [203.254.230.142]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MO6008YPHJD1PP0@mailout2.samsung.com> for linux-media@vger.kernel.org; Mon, 10 Jun 2013 22:02:23 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.126]) by epcpsbgr2.samsung.com (EPCPMTA) with SMTP id 86.66.08825.E5EC5B15; Mon, 10 Jun 2013 22:02:23 +0900 (KST) X-AuditID: cbfee68e-b7f276d000002279-b2-51b5ce5e02cb Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 08.9D.21068.E5EC5B15; Mon, 10 Jun 2013 22:02:22 +0900 (KST) Received: from chromeserver-PowerEdge-T410.sisodomain.com ([107.108.73.106]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MO600DO7HEHPR30@mmp1.samsung.com>; Mon, 10 Jun 2013 22:02:22 +0900 (KST) From: Arun Kumar K To: linux-media@vger.kernel.org Cc: k.debski@samsung.com, jtp.park@samsung.com, s.nawrocki@samsung.com, avnd.kiran@samsung.com, arunkk.samsung@gmail.com Subject: [PATCH 4/6] [media] s5p-mfc: Update driver for v7 firmware Date: Mon, 10 Jun 2013 18:53:04 +0530 Message-id: <1370870586-24141-5-git-send-email-arun.kk@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1370870586-24141-1-git-send-email-arun.kk@samsung.com> References: <1370870586-24141-1-git-send-email-arun.kk@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrELMWRmVeSWpSXmKPExsWyRsSkTjf+3NZAgyu1Fi823mK3eDm7j9ni yNqrTBY/Xl9gs+jZsJXV4vCbdlYHNo+ds+6ye/RtWcXo8XmTXABzFJdNSmpOZllqkb5dAldG w9zzjAVXtCuefj3E3MB4WqWLkZNDQsBEon9bOxuELSZx4d56IJuLQ0hgKaPEmf4/bDBFHV9e sIPYQgKLGCVennOAKJrNJHH42EcWkASbgIbEvROPWUFsEQF5iSe9N4CaOTiYBaokLt3WAjGF BZwlrlxRA6lgEVCVmDR5LztImBcovLRREWKTokT3swlgjZwCLhLblnNCLHWWOD2ngxFkqYRA M7tE87qnjBBjBCS+TT7EAlIvISArsekAM8QYSYmDK26wTGAUXsDIsIpRNLUguaA4Kb3ISK84 Mbe4NC9dLzk/dxMjMHxP/3vWt4Px5gHrQ4zJQOMmMkuJJucDwz+vJN7Q2MzIwtTE1NjI3NKM NGElcV61FutAIYH0xJLU7NTUgtSi+KLSnNTiQ4xMHJxSDYwldod5/gc48WxcK6a9tsFV1O5d k0HoA6Mpf98c/rmOy09u64rFfDMFL+w21naoc1GOZi/O8DZwvH2pzO5hnq6W0tFkn98OO3t3 SbX/nKtXcTSjZ1nmF65DsyeJbr6yelZhfsRblpgJGl+PvWpQf3/L6dSyNNXNHxkvuDQ+cr7w Kz6iw0FQ5roSS3FGoqEWc1FxIgCDigTgdQIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrAIsWRmVeSWpSXmKPExsVy+t9jAd24c1sDDZ6uMrV4sfEWu8XL2X3M FkfWXmWy+PH6AptFz4atrBaH37SzOrB57Jx1l92jb8sqRo/Pm+QCmKMaGG0yUhNTUosUUvOS 81My89JtlbyD453jTc0MDHUNLS3MlRTyEnNTbZVcfAJ03TJzgBYrKZQl5pQChQISi4uV9O0w TQgNcdO1gGmM0PUNCYLrMTJAAwlrGDMa5p5nLLiiXfH06yHmBsbTKl2MnBwSAiYSHV9esEPY YhIX7q1nA7GFBBYxSrw859DFyAVkz2aSOHzsIwtIgk1AQ+LeicesILaIgLzEk94bQA0cHMwC VRKXbmuBmMICzhJXrqiBVLAIqEpMmryXHSTMCxRe2qgIsUlRovvZBLBGTgEXiW3LOSGWOkuc ntPBOIGRdwEjwypG0dSC5ILipPRcI73ixNzi0rx0veT83E2M4Ph4Jr2DcVWDxSFGAQ5GJR7e B7+2BAqxJpYVV+YeYpTgYFYS4ZXdsjVQiDclsbIqtSg/vqg0J7X4EGMy0E0TmaVEk/OBsZtX Em9obGJuamxqaWJhYmZJmrCSOO/BVutAIYH0xJLU7NTUgtQimC1MHJxSDYzLvx7/qHfh98SM tTrf3/yad9mudtoeZfYLrKn9u74v95nxZN8e39nsT3KZ5L806Qg+1AzpP70pQkXP/rrhp5dK zYsNZ3xeuq7VYNntCv45md+d5Vo/XYzPO2WZs3DTT+PjXGbLNa22W2lsDDw8f53EdJfNH/71 FkVxSOvZqeass/7XI6Mw+ZSlEktxRqKhFnNRcSIA9pQxINMCAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Firmware version v7 is mostly similar to v6 in terms of hardware specific controls and commands. So the hardware specific opr_v6 and cmd_v6 are re-used for v7 also. This patch updates the v6 files to handle v7 version also. Signed-off-by: Arun Kumar K --- drivers/media/platform/s5p-mfc/s5p_mfc_enc.c | 12 ++++- drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 53 +++++++++++++++++++---- 2 files changed, 54 insertions(+), 11 deletions(-) diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c index 2549967..13799a8 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c @@ -1662,8 +1662,16 @@ static int s5p_mfc_queue_setup(struct vb2_queue *vq, *buf_count = 1; if (*buf_count > MFC_MAX_BUFFERS) *buf_count = MFC_MAX_BUFFERS; - psize[0] = ctx->luma_size; - psize[1] = ctx->chroma_size; + + if (IS_MFCV7(dev)) { + /* MFCv7 needs pad bytes for input YUV */ + psize[0] = ctx->luma_size + 256; + psize[1] = ctx->chroma_size + 128; + } else { + psize[0] = ctx->luma_size; + psize[1] = ctx->chroma_size; + } + if (IS_MFCV6(dev)) { allocators[0] = ctx->dev->alloc_ctx[MFC_BANK1_ALLOC_CTX]; diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c index 7d4c5e1..7145ae5 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c @@ -80,6 +80,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 * ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V6(mb_width, mb_height), S5P_FIMV_TMV_BUFFER_ALIGN_V6); + ctx->luma_dpb_size = ALIGN((mb_width * mb_height) * S5P_FIMV_LUMA_MB_TO_PIXEL_V6, S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6); @@ -112,10 +113,18 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) (ctx->mv_count * ctx->mv_size); break; case S5P_MFC_CODEC_MPEG4_DEC: - ctx->scratch_buf_size = - S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_DEC_V6( - mb_width, - mb_height); + if (IS_MFCV7(dev)) { + ctx->scratch_buf_size = + S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_DEC_V7( + mb_width, + mb_height); + } else { + ctx->scratch_buf_size = + S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_DEC_V6( + mb_width, + mb_height); + } + ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6); ctx->bank1.size = ctx->scratch_buf_size; @@ -453,8 +462,13 @@ static void s5p_mfc_set_enc_frame_buffer_v6(struct s5p_mfc_ctx *ctx, { struct s5p_mfc_dev *dev = ctx->dev; - WRITEL(y_addr, S5P_FIMV_E_SOURCE_LUMA_ADDR_V6); /* 256B align */ - WRITEL(c_addr, S5P_FIMV_E_SOURCE_CHROMA_ADDR_V6); + if (IS_MFCV7(dev)) { + WRITEL(y_addr, S5P_FIMV_E_SOURCE_FIRST_ADDR_V7); + WRITEL(c_addr, S5P_FIMV_E_SOURCE_SECOND_ADDR_V7); + } else { + WRITEL(y_addr, S5P_FIMV_E_SOURCE_LUMA_ADDR_V6); + WRITEL(c_addr, S5P_FIMV_E_SOURCE_CHROMA_ADDR_V6); + } mfc_debug(2, "enc src y buf addr: 0x%08lx\n", y_addr); mfc_debug(2, "enc src c buf addr: 0x%08lx\n", c_addr); @@ -466,8 +480,13 @@ static void s5p_mfc_get_enc_frame_buffer_v6(struct s5p_mfc_ctx *ctx, struct s5p_mfc_dev *dev = ctx->dev; unsigned long enc_recon_y_addr, enc_recon_c_addr; - *y_addr = READL(S5P_FIMV_E_ENCODED_SOURCE_LUMA_ADDR_V6); - *c_addr = READL(S5P_FIMV_E_ENCODED_SOURCE_CHROMA_ADDR_V6); + if (IS_MFCV7(dev)) { + *y_addr = READL(S5P_FIMV_E_ENCODED_SOURCE_FIRST_ADDR_V7); + *c_addr = READL(S5P_FIMV_E_ENCODED_SOURCE_SECOND_ADDR_V7); + } else { + *y_addr = READL(S5P_FIMV_E_ENCODED_SOURCE_LUMA_ADDR_V6); + *c_addr = READL(S5P_FIMV_E_ENCODED_SOURCE_CHROMA_ADDR_V6); + } enc_recon_y_addr = READL(S5P_FIMV_E_RECON_LUMA_DPB_ADDR_V6); enc_recon_c_addr = READL(S5P_FIMV_E_RECON_CHROMA_DPB_ADDR_V6); @@ -1166,6 +1185,12 @@ static int s5p_mfc_init_decode_v6(struct s5p_mfc_ctx *ctx) reg |= (0x1 << S5P_FIMV_D_OPT_DDELAY_EN_SHIFT_V6); WRITEL(ctx->display_delay, S5P_FIMV_D_DISPLAY_DELAY_V6); } + + if (IS_MFCV7(dev)) { + WRITEL(reg, S5P_FIMV_D_DEC_OPTIONS_V6); + reg = 0; + } + /* Setup loop filter, for decoding this is only valid for MPEG4 */ if (ctx->codec_mode == S5P_MFC_CODEC_MPEG4_DEC) { mfc_debug(2, "Set loop filter to: %d\n", @@ -1176,7 +1201,10 @@ static int s5p_mfc_init_decode_v6(struct s5p_mfc_ctx *ctx) if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_NV12MT_16X16) reg |= (0x1 << S5P_FIMV_D_OPT_TILE_MODE_SHIFT_V6); - WRITEL(reg, S5P_FIMV_D_DEC_OPTIONS_V6); + if (IS_MFCV7(dev)) + WRITEL(reg, S5P_FIMV_D_INIT_BUFFER_OPTIONS_V7); + else + WRITEL(reg, S5P_FIMV_D_DEC_OPTIONS_V6); /* 0: NV12(CbCr), 1: NV21(CrCb) */ if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_NV21M) @@ -1184,6 +1212,7 @@ static int s5p_mfc_init_decode_v6(struct s5p_mfc_ctx *ctx) else WRITEL(0x0, S5P_FIMV_PIXEL_FORMAT_V6); + /* sei parse */ WRITEL(ctx->sei_fp_parse & 0x1, S5P_FIMV_D_SEI_ENABLE_V6); @@ -1254,6 +1283,12 @@ static int s5p_mfc_init_encode_v6(struct s5p_mfc_ctx *ctx) return -EINVAL; } + /* Set stride lengths */ + if (IS_MFCV7(dev)) { + WRITEL(ctx->img_width, S5P_FIMV_E_SOURCE_FIRST_STRIDE_V7); + WRITEL(ctx->img_width, S5P_FIMV_E_SOURCE_SECOND_STRIDE_V7); + } + WRITEL(ctx->inst_no, S5P_FIMV_INSTANCE_ID_V6); s5p_mfc_hw_call(dev->mfc_cmds, cmd_host2risc, dev, S5P_FIMV_CH_SEQ_HEADER_V6, NULL);