From patchwork Wed Oct 16 16:28:14 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 3054611 Return-Path: X-Original-To: patchwork-linux-media@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id A098BBF924 for ; Wed, 16 Oct 2013 16:29:57 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DC141204AD for ; Wed, 16 Oct 2013 16:29:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 976F7204AC for ; Wed, 16 Oct 2013 16:29:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760995Ab3JPQ2y (ORCPT ); Wed, 16 Oct 2013 12:28:54 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:52823 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1760988Ab3JPQ2w (ORCPT ); Wed, 16 Oct 2013 12:28:52 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id r9GGSVxq032300; Wed, 16 Oct 2013 11:28:31 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id r9GGSVgD022512; Wed, 16 Oct 2013 11:28:31 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.2.342.3; Wed, 16 Oct 2013 11:28:31 -0500 Received: from a0393678ub.apr.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id r9GGSHw5031445; Wed, 16 Oct 2013 11:28:29 -0500 From: Kishon Vijay Abraham I To: CC: , , , , Subject: [PATCH 5/7] phy: Add driver for Exynos DP PHY Date: Wed, 16 Oct 2013 21:58:14 +0530 Message-ID: <1381940896-9355-6-git-send-email-kishon@ti.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1381940896-9355-1-git-send-email-kishon@ti.com> References: <1381940896-9355-1-git-send-email-kishon@ti.com> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jingoo Han Add a PHY provider driver for the Samsung Exynos SoC Display Port PHY. Signed-off-by: Jingoo Han Reviewed-by: Tomasz Figa Cc: Sylwester Nawrocki Acked-by: Felipe Balbi Signed-off-by: Kishon Vijay Abraham I --- .../devicetree/bindings/phy/samsung-phy.txt | 8 ++ drivers/phy/Kconfig | 7 ++ drivers/phy/Makefile | 1 + drivers/phy/phy-exynos-dp-video.c | 111 ++++++++++++++++++++ 4 files changed, 127 insertions(+) create mode 100644 drivers/phy/phy-exynos-dp-video.c diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt index 5ff208c..c0fccaa 100644 --- a/Documentation/devicetree/bindings/phy/samsung-phy.txt +++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt @@ -12,3 +12,11 @@ the PHY specifier identifies the PHY and its meaning is as follows: 1 - MIPI DSIM 0, 2 - MIPI CSIS 1, 3 - MIPI DSIM 1. + +Samsung EXYNOS SoC series Display Port PHY +------------------------------------------------- + +Required properties: +- compatible : should be "samsung,exynos5250-dp-video-phy"; +- reg : offset and length of the Display Port PHY register set; +- #phy-cells : from the generic PHY bindings, must be 0; diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 0062d7e..a344f3d 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -44,4 +44,11 @@ config TWL4030_USB This transceiver supports high and full speed devices plus, in host mode, low speed. +config PHY_EXYNOS_DP_VIDEO + tristate "EXYNOS SoC series Display Port PHY driver" + depends on OF + select GENERIC_PHY + help + Support for Display Port PHY found on Samsung EXYNOS SoCs. + endmenu diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index 6344053..d0caae9 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -3,6 +3,7 @@ # obj-$(CONFIG_GENERIC_PHY) += phy-core.o +obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO) += phy-exynos-dp-video.o obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO) += phy-exynos-mipi-video.o obj-$(CONFIG_OMAP_USB2) += phy-omap-usb2.o obj-$(CONFIG_TWL4030_USB) += phy-twl4030-usb.o diff --git a/drivers/phy/phy-exynos-dp-video.c b/drivers/phy/phy-exynos-dp-video.c new file mode 100644 index 0000000..1dbe6ce --- /dev/null +++ b/drivers/phy/phy-exynos-dp-video.c @@ -0,0 +1,111 @@ +/* + * Samsung EXYNOS SoC series Display Port PHY driver + * + * Copyright (C) 2013 Samsung Electronics Co., Ltd. + * Author: Jingoo Han + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include + +/* DPTX_PHY_CONTROL register */ +#define EXYNOS_DPTX_PHY_ENABLE (1 << 0) + +struct exynos_dp_video_phy { + void __iomem *regs; +}; + +static int __set_phy_state(struct exynos_dp_video_phy *state, unsigned int on) +{ + u32 reg; + + reg = readl(state->regs); + if (on) + reg |= EXYNOS_DPTX_PHY_ENABLE; + else + reg &= ~EXYNOS_DPTX_PHY_ENABLE; + writel(reg, state->regs); + + return 0; +} + +static int exynos_dp_video_phy_power_on(struct phy *phy) +{ + struct exynos_dp_video_phy *state = phy_get_drvdata(phy); + + return __set_phy_state(state, 1); +} + +static int exynos_dp_video_phy_power_off(struct phy *phy) +{ + struct exynos_dp_video_phy *state = phy_get_drvdata(phy); + + return __set_phy_state(state, 0); +} + +static struct phy_ops exynos_dp_video_phy_ops = { + .power_on = exynos_dp_video_phy_power_on, + .power_off = exynos_dp_video_phy_power_off, + .owner = THIS_MODULE, +}; + +static int exynos_dp_video_phy_probe(struct platform_device *pdev) +{ + struct exynos_dp_video_phy *state; + struct device *dev = &pdev->dev; + struct resource *res; + struct phy_provider *phy_provider; + struct phy *phy; + + state = devm_kzalloc(dev, sizeof(*state), GFP_KERNEL); + if (!state) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + + state->regs = devm_ioremap_resource(dev, res); + if (IS_ERR(state->regs)) + return PTR_ERR(state->regs); + + phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + if (IS_ERR(phy_provider)) + return PTR_ERR(phy_provider); + + phy = devm_phy_create(dev, &exynos_dp_video_phy_ops, NULL); + if (IS_ERR(phy)) { + dev_err(dev, "failed to create Display Port PHY\n"); + return PTR_ERR(phy); + } + phy_set_drvdata(phy, state); + + return 0; +} + +static const struct of_device_id exynos_dp_video_phy_of_match[] = { + { .compatible = "samsung,exynos5250-dp-video-phy" }, + { }, +}; +MODULE_DEVICE_TABLE(of, exynos_dp_video_phy_of_match); + +static struct platform_driver exynos_dp_video_phy_driver = { + .probe = exynos_dp_video_phy_probe, + .driver = { + .name = "exynos-dp-video-phy", + .owner = THIS_MODULE, + .of_match_table = exynos_dp_video_phy_of_match, + } +}; +module_platform_driver(exynos_dp_video_phy_driver); + +MODULE_AUTHOR("Jingoo Han "); +MODULE_DESCRIPTION("Samsung EXYNOS SoC DP PHY driver"); +MODULE_LICENSE("GPL v2");