From patchwork Sat Jun 7 21:56:39 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Longerbeam X-Patchwork-Id: 4316281 Return-Path: X-Original-To: patchwork-linux-media@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 68C29BEECB for ; Sat, 7 Jun 2014 21:58:22 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8E09720266 for ; Sat, 7 Jun 2014 21:58:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A0C332025A for ; Sat, 7 Jun 2014 21:58:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753392AbaFGV57 (ORCPT ); Sat, 7 Jun 2014 17:57:59 -0400 Received: from mail-pb0-f48.google.com ([209.85.160.48]:62028 "EHLO mail-pb0-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753376AbaFGV5j (ORCPT ); Sat, 7 Jun 2014 17:57:39 -0400 Received: by mail-pb0-f48.google.com with SMTP id rr13so3920401pbb.21 for ; Sat, 07 Jun 2014 14:57:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=AKsiz/QpC9zmJ5J/QYg4JabbiwmvhszvpqNdg7v5vLc=; b=F6bKqe289+kQdEEdajbANR1osm4eAdvWGeBWqKMiJRPUyTfSbFOnAQ1HguCrkkN94U 5Y0uhiPxgylNgk3zfOXv75ikVOarm06TxGE7L3pqPBcUTgfVfBZCLcrbS6r+idAyxp/8 7XNrZpKxQsjTfr8dO/RsUlyLdNx1hh6ZJL4iUGA2NLJqurfQfwMi2bZfV1U+WsZhm62E zTvIRBIjWUIagLcK/0ifRUxlKh/jHOnMdILQIEeEj10ljM9IyGUOwQ/6ohrSSIK2H3ey xCB54wIhyWaskjVovTNEKrxO5EHRBHVzPXqXj3XwCze6mka/gdkUTDSL/TGoWY5+PuOQ j9PQ== X-Received: by 10.68.137.193 with SMTP id qk1mr2460694pbb.155.1402178259578; Sat, 07 Jun 2014 14:57:39 -0700 (PDT) Received: from slongerb-fremont-linux.mgc.mentorg.com (c-98-248-118-71.hsd1.ca.comcast.net. [98.248.118.71]) by mx.google.com with ESMTPSA id fx5sm52769595pbb.62.2014.06.07.14.57.38 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 07 Jun 2014 14:57:39 -0700 (PDT) From: Steve Longerbeam X-Google-Original-From: Steve Longerbeam To: linux-media@vger.kernel.org Cc: Steve Longerbeam , Liu Ying Subject: [PATCH 37/43] ARM: imx6q: clk: Add video 27m clock Date: Sat, 7 Jun 2014 14:56:39 -0700 Message-Id: <1402178205-22697-38-git-send-email-steve_longerbeam@mentor.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1402178205-22697-1-git-send-email-steve_longerbeam@mentor.com> References: <1402178205-22697-1-git-send-email-steve_longerbeam@mentor.com> Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Adds a 27MHz clock that is a fixed /20 from the pll3_pfd1_540m clock. The MIPI CSI2 receiver depends on this clock for its D-PHY operation. Based on ENGR00275483-1 from Freescale. Signed-off-by: Liu Ying Signed-off-by: Steve Longerbeam --- .../devicetree/bindings/clock/imx6q-clock.txt | 1 + arch/arm/mach-imx/clk-imx6q.c | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.txt b/Documentation/devicetree/bindings/clock/imx6q-clock.txt index 6aab72b..32dc74f 100644 --- a/Documentation/devicetree/bindings/clock/imx6q-clock.txt +++ b/Documentation/devicetree/bindings/clock/imx6q-clock.txt @@ -220,6 +220,7 @@ clocks and IDs. lvds2_sel 205 lvds1_gate 206 lvds2_gate 207 + video_27m 208 Examples: diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index 2b4d6ac..ca87984 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -107,7 +107,7 @@ enum mx6q_clks { sata_ref, sata_ref_100m, pcie_ref, pcie_ref_125m, enet_ref, usbphy1_gate, usbphy2_gate, pll4_post_div, pll5_post_div, pll5_video_div, eim_slow, spdif, cko2_sel, cko2_podf, cko2, cko, vdoa, pll4_audio_div, - lvds1_sel, lvds2_sel, lvds1_gate, lvds2_gate, clk_max + lvds1_sel, lvds2_sel, lvds1_gate, lvds2_gate, video_27m, clk_max }; static struct clk *clk[clk_max]; @@ -226,6 +226,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) clk[pll3_80m] = imx_clk_fixed_factor("pll3_80m", "pll3_usb_otg", 1, 6); clk[pll3_60m] = imx_clk_fixed_factor("pll3_60m", "pll3_usb_otg", 1, 8); clk[twd] = imx_clk_fixed_factor("twd", "arm", 1, 2); + clk[video_27m] = imx_clk_fixed_factor("video_27m", "pll3_pfd1_540m", 1, 20); clk[pll4_post_div] = clk_register_divider_table(NULL, "pll4_post_div", "pll4_audio", CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); clk[pll4_audio_div] = clk_register_divider(NULL, "pll4_audio_div", "pll4_post_div", CLK_SET_RATE_PARENT, base + 0x170, 15, 1, 0, &imx_ccm_lock);