From patchwork Thu Jun 26 01:05:42 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Longerbeam X-Patchwork-Id: 4425231 Return-Path: X-Original-To: patchwork-linux-media@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 95CAABEEAA for ; Thu, 26 Jun 2014 01:08:14 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BEE482037B for ; Thu, 26 Jun 2014 01:08:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E144B20377 for ; Thu, 26 Jun 2014 01:08:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932404AbaFZBII (ORCPT ); Wed, 25 Jun 2014 21:08:08 -0400 Received: from mail-pd0-f180.google.com ([209.85.192.180]:56872 "EHLO mail-pd0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932141AbaFZBH1 (ORCPT ); Wed, 25 Jun 2014 21:07:27 -0400 Received: by mail-pd0-f180.google.com with SMTP id fp1so2327980pdb.39 for ; Wed, 25 Jun 2014 18:07:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=j1qossy1cOOWRro9VF2nby/mVzNXPuP7y1HTYcRtO0k=; b=nvHz397R61q0MKVRziM0r7XIsepYFfdp0/jjm3Ty8+W2ORPKhKZv0ldv0mwNnO8vDc h+RF7qR3Id9iE7N6NagIKtaIUfwz4dX+bDqm3kKqr8A7z2Sg5b1tFvBYgbSunZUZRQ0e 5dHGiyrriJUA/oRS/hQXvd8tTU83Bulx4S2zW8SxyZ+XOJYqjnZUkJQRy8O91LNjB8P+ BMIyO9IYnti1dvM3uvBRhG1O4taLd9AOOdqVRNchWGnvE8t7pFfQ9TWTfGmayE5cHuIs 24ip5uMS3jLbJbu53Bbteaxz6639Wx9Uz1Mtog4d3NL3bIcVjvAJYTZFQfz1Ap7PoYAo eRgA== X-Received: by 10.66.66.108 with SMTP id e12mr16580831pat.35.1403744847233; Wed, 25 Jun 2014 18:07:27 -0700 (PDT) Received: from mothership.mgc.mentorg.com (c-50-152-159-227.hsd1.ca.comcast.net. [50.152.159.227]) by mx.google.com with ESMTPSA id gg3sm7139010pbc.34.2014.06.25.18.07.26 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 25 Jun 2014 18:07:26 -0700 (PDT) From: Steve Longerbeam X-Google-Original-From: Steve Longerbeam To: linux-media@vger.kernel.org Cc: Steve Longerbeam Subject: [PATCH 15/28] gpu: ipu-v3: Add __ipu_idmac_reset_current_buffer() Date: Wed, 25 Jun 2014 18:05:42 -0700 Message-Id: <1403744755-24944-16-git-send-email-steve_longerbeam@mentor.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1403744755-24944-1-git-send-email-steve_longerbeam@mentor.com> References: <1403744755-24944-1-git-send-email-steve_longerbeam@mentor.com> Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Adds __ipu_idmac_reset_current_buffer() that resets a channel's internal current buffer pointer so that transfers start from buffer 0 on the next channel enable. This operation is required for channel linking to work correctly, for instance video capture pipelines that carry out image rotations will fail after the first streaming unless this function is called for each channel before re-enabling the channels. Signed-off-by: Steve Longerbeam --- drivers/gpu/ipu-v3/ipu-common.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c index 63f2cf2..7701974 100644 --- a/drivers/gpu/ipu-v3/ipu-common.c +++ b/drivers/gpu/ipu-v3/ipu-common.c @@ -684,6 +684,25 @@ EXPORT_SYMBOL_GPL(ipu_idmac_put); #define idma_mask(ch) (1 << ((ch) & 0x1f)) +/* + * This is an undocumented feature, a write one to a channel bit in + * IPU_CHA_CUR_BUF and IPU_CHA_TRIPLE_CUR_BUF will reset the channel's + * internal current buffer pointer so that transfers start from buffer + * 0 on the next channel enable (that's the theory anyway, the imx6 TRM + * only says these are read-only registers). This operation is required + * for channel linking to work correctly, for instance video capture + * pipelines that carry out image rotations will fail after the first + * streaming unless this function is called for each channel before + * re-enabling the channels. + */ +static void __ipu_idmac_reset_current_buffer(struct ipuv3_channel *channel) +{ + struct ipu_soc *ipu = channel->ipu; + unsigned int chno = channel->num; + + ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_CUR_BUF(chno)); +} + void ipu_idmac_set_double_buffer(struct ipuv3_channel *channel, bool doublebuffer) { @@ -700,6 +719,8 @@ void ipu_idmac_set_double_buffer(struct ipuv3_channel *channel, reg &= ~idma_mask(channel->num); ipu_cm_write(ipu, reg, IPU_CHA_DB_MODE_SEL(channel->num)); + __ipu_idmac_reset_current_buffer(channel); + spin_unlock_irqrestore(&ipu->lock, flags); } EXPORT_SYMBOL_GPL(ipu_idmac_set_double_buffer); @@ -905,6 +926,8 @@ int ipu_idmac_disable_channel(struct ipuv3_channel *channel) val &= ~idma_mask(channel->num); ipu_idmac_write(ipu, val, IDMAC_CHA_EN(channel->num)); + __ipu_idmac_reset_current_buffer(channel); + /* Set channel buffers NOT to be ready */ ipu_cm_write(ipu, 0xf0000000, IPU_GPR); /* write one to clear */