From patchwork Thu Dec 29 22:27:19 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Longerbeam X-Patchwork-Id: 9491619 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 29B9562AB7 for ; Thu, 29 Dec 2016 22:33:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 153AB25D99 for ; Thu, 29 Dec 2016 22:33:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 053C125D9E; Thu, 29 Dec 2016 22:33:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 867D62018E for ; Thu, 29 Dec 2016 22:33:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753764AbcL2WdX (ORCPT ); Thu, 29 Dec 2016 17:33:23 -0500 Received: from mail-pg0-f67.google.com ([74.125.83.67]:35708 "EHLO mail-pg0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753039AbcL2W2D (ORCPT ); Thu, 29 Dec 2016 17:28:03 -0500 Received: by mail-pg0-f67.google.com with SMTP id i5so20101360pgh.2; Thu, 29 Dec 2016 14:28:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4vxiFieH8IqLK/Td8/CwF/YSakei3bPTcOsPiTvwBQc=; b=VEOIVdJiGOn1RU9VOanAPSd89A87d002Y2NSGNiAT59NiScnRhSCxSUc7n0fwjV5Sh EnedUsBAcwurn8++iC/i+MEd+FOzHgeojsE95KMZ6NBbtUDorxlhm9i0kzn9LayvhRLu i1icK2zD6COLW31gr+gAcyHWpy4mpwQKg1u5lZcwfTiHCeigf1GJjVg6HLnxhSL0bZmC V9dtQvOc8h7YfoFoG23w0poVXB7RbTGnQG+kzn4kmYfiHsblbdiRxX+L1v/lGt7gslEw 86BTVBhfGszZ0EHRWVwTCCz/57532SZTaEPC4b3swxyBl2PNq1CEd15STF4bu+0zCGYi xrkg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4vxiFieH8IqLK/Td8/CwF/YSakei3bPTcOsPiTvwBQc=; b=PTruyJaYTe22nHsXXnD8FYC4WJpmrTRGgy+lfH8TBoqgmEcu9+eQn7ukAYpwzL8ywE paAqXbm4iJWyobrT/ESOjbLmtxPcVug0SZcoNV11cNTT84L2YjIJMbkgGuwiIsSYAsVa V8vKPVEOoMfm0BXiNhOGkhQ4ooXmqwvenYyCDeTrglVzDGDhX0knaoyTWXo5mld+ttAH NHvjktjSa0odr61kU4kH65h90yg8zW0T5q59j9Ynq3nGVziXMK72pgmjE7JykaMFpFXE ylxjJZbuRmYWdjxKzvrCoy6g8D/YgNWC8YGjtPcgk9LumZXw09adtnPjbFxql/uwJvlj Amfw== X-Gm-Message-State: AIkVDXLqFNz5QRFGnV0xHGaE3TNAxeXP9DSVYx2hRiRPH8wQpmVXZQ3hyxnFQyWtyBzusQ== X-Received: by 10.98.59.22 with SMTP id i22mr26614040pfa.142.1483050481976; Thu, 29 Dec 2016 14:28:01 -0800 (PST) Received: from majic.sklembedded.com (c-73-241-2-21.hsd1.ca.comcast.net. [73.241.2.21]) by smtp.googlemail.com with ESMTPSA id u3sm107243068pfk.3.2016.12.29.14.28.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 29 Dec 2016 14:28:00 -0800 (PST) From: Steve Longerbeam X-Google-Original-From: Steve Longerbeam To: shawnguo@kernel.org, kernel@pengutronix.de, fabio.estevam@nxp.com, robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, linus.walleij@linaro.org, gnurou@gmail.com, mchehab@kernel.org, gregkh@linuxfoundation.org, p.zabel@pengutronix.de Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-media@vger.kernel.org, devel@driverdev.osuosl.org, Steve Longerbeam Subject: [PATCH 04/20] ARM: dts: imx6-sabrelite: add OV5642 and OV5640 camera sensors Date: Thu, 29 Dec 2016 14:27:19 -0800 Message-Id: <1483050455-10683-5-git-send-email-steve_longerbeam@mentor.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1483050455-10683-1-git-send-email-steve_longerbeam@mentor.com> References: <1483050455-10683-1-git-send-email-steve_longerbeam@mentor.com> Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Enables the OV5642 parallel-bus sensor, and the OV5640 MIPI CSI-2 sensor. Both hang off the same i2c2 bus, so they require different (and non- default) i2c slave addresses. The OV5642 connects to the parallel-bus mux input port on ipu1_csi0_mux. The OV5640 connects to the input port on the MIPI CSI-2 receiver on mipi_csi. It is set to transmit over MIPI virtual channel 1. Note there is a pin conflict with GPIO6. This pin functions as a power input pin to the OV5642, but ENET uses it as the h/w workaround for erratum ERR006687, to wake-up the ARM cores on normal RX and TX packet done events (see 6261c4c8). So workaround 6261c4c8 is reverted here to support the OV5642, and the "fsl,err006687-workaround-present" boolean also must be removed. The result is that the CPUidle driver will no longer allow entering the deep idle states on the sabrelite. Signed-off-by: Steve Longerbeam --- arch/arm/boot/dts/imx6dl-sabrelite.dts | 5 ++ arch/arm/boot/dts/imx6q-sabrelite.dts | 6 ++ arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 122 ++++++++++++++++++++++++++++++- 3 files changed, 129 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/imx6dl-sabrelite.dts b/arch/arm/boot/dts/imx6dl-sabrelite.dts index 0f06ca5..fec2524 100644 --- a/arch/arm/boot/dts/imx6dl-sabrelite.dts +++ b/arch/arm/boot/dts/imx6dl-sabrelite.dts @@ -48,3 +48,8 @@ model = "Freescale i.MX6 DualLite SABRE Lite Board"; compatible = "fsl,imx6dl-sabrelite", "fsl,imx6dl"; }; + +&ipu1_csi1_from_ipu1_csi1_mux { + data-lanes = <0 1>; + clock-lanes = <2>; +}; diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts index 66d10d8..9e2d26d 100644 --- a/arch/arm/boot/dts/imx6q-sabrelite.dts +++ b/arch/arm/boot/dts/imx6q-sabrelite.dts @@ -52,3 +52,9 @@ &sata { status = "okay"; }; + +&ipu1_csi1_from_mipi_vc1 { + data-lanes = <0 1>; + clock-lanes = <2>; +}; + diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi index 1f9076e..4a50bb1 100644 --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi @@ -39,6 +39,8 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ + +#include #include #include @@ -96,6 +98,15 @@ }; }; + mipi_xclk: mipi_xclk { + compatible = "pwm-clock"; + #clock-cells = <0>; + clock-frequency = <22000000>; + clock-output-names = "mipi_pwm3"; + pwms = <&pwm3 0 45>; /* 1 / 45 ns = 22 MHz */ + status = "okay"; + }; + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; @@ -220,6 +231,22 @@ }; }; +&ipu1_csi0_from_ipu1_csi0_mux { + bus-width = <8>; + data-shift = <12>; /* Lines 19:12 used */ + hsync-active = <1>; + vync-active = <1>; +}; + +&ipu1_csi0_mux_from_parallel_sensor { + remote-endpoint = <&ov5642_to_ipu1_csi0_mux>; +}; + +&ipu1_csi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ipu1_csi0>; +}; + &audmux { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_audmux>; @@ -271,9 +298,6 @@ txd1-skew-ps = <0>; txd2-skew-ps = <0>; txd3-skew-ps = <0>; - interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, - <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; - fsl,err006687-workaround-present; status = "okay"; }; @@ -302,6 +326,52 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; + + camera: ov5642@42 { + compatible = "ovti,ov5642"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ov5642>; + clocks = <&clks IMX6QDL_CLK_CKO2>; + clock-names = "xclk"; + reg = <0x42>; + xclk = <24000000>; + reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; + pwdn-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; + gp-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; + + port { + ov5642_to_ipu1_csi0_mux: endpoint { + remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; + bus-width = <8>; + hsync-active = <1>; + vsync-active = <1>; + }; + }; + }; + + mipi_camera: ov5640@40 { + compatible = "ovti,ov5640_mipi"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ov5640>; + clocks = <&mipi_xclk>; + clock-names = "xclk"; + reg = <0x40>; + xclk = <22000000>; + reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* NANDF_D5 */ + pwdn-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* NANDF_WP_B */ + + port { + #address-cells = <1>; + #size-cells = <0>; + + ov5640_to_mipi_csi: endpoint@1 { + reg = <1>; + remote-endpoint = <&mipi_csi_from_mipi_sensor>; + data-lanes = <0 1>; + clock-lanes = <2>; + }; + }; + }; }; &i2c3 { @@ -374,7 +444,6 @@ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 /* Phy reset */ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0 - MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 >; }; @@ -449,6 +518,39 @@ >; }; + pinctrl_ov5642: ov5642grp { + fsl,pins = < + MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x80000000 + MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x80000000 + MX6QDL_PAD_GPIO_3__CCM_CLKO2 0x80000000 + >; + }; + + pinctrl_ipu1_csi0: ipu1grp-csi0 { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x80000000 + MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x80000000 + MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x80000000 + MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x80000000 + MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x80000000 + MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x80000000 + MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x80000000 + MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x80000000 + MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x80000000 + MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x80000000 + MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x80000000 + MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x80000000 + >; + }; + + pinctrl_ov5640: ov5640grp { + fsl,pins = < + MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x000b0 + MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x0b0b0 + >; + }; + pinctrl_pwm1: pwm1grp { fsl,pins = < MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 @@ -605,3 +707,15 @@ vmmc-supply = <®_3p3v>; status = "okay"; }; + +&mipi_csi { + status = "okay"; +}; + +/* Incoming port from sensor */ +&mipi_csi_from_mipi_sensor { + remote-endpoint = <&ov5640_to_mipi_csi>; + data-lanes = <0 1>; + clock-lanes = <2>; +}; +