From patchwork Tue Jun 27 11:07:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: yong X-Patchwork-Id: 9811395 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 91BA6603D7 for ; Tue, 27 Jun 2017 11:08:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 865B128384 for ; Tue, 27 Jun 2017 11:08:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7A5832842A; Tue, 27 Jun 2017 11:08:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DDB87283AF for ; Tue, 27 Jun 2017 11:08:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751632AbdF0LIB (ORCPT ); Tue, 27 Jun 2017 07:08:01 -0400 Received: from out20-75.mail.aliyun.com ([115.124.20.75]:60544 "EHLO out20-75.mail.aliyun.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752112AbdF0LH4 (ORCPT ); Tue, 27 Jun 2017 07:07:56 -0400 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.07984344|-1; FP=0|0|0|0|0|-1|-1|-1; HT=e02c03299; MF=yong.deng@magewell.com; NM=1; PH=DS; RN=23; RT=23; SR=0; TI=SMTPD_---.8IcekyU_1498561658; Received: from linuxproject.localdomain(mailfrom:yong.deng@magewell.com ip:58.213.29.2) by smtp.aliyun-inc.com(10.147.43.230); Tue, 27 Jun 2017 19:07:40 +0800 From: Yong Deng To: mchehab@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@free-electrons.com, wens@csie.org, hans.verkuil@cisco.com, peter.griffin@linaro.org, hugues.fruchet@st.com, krzk@kernel.org, bparrot@ti.com, arnd@arndb.de, jean-christophe.trotin@st.com, benjamin.gaignard@linaro.org, tiffany.lin@mediatek.com, kamil@wypas.org, kieran+renesas@ksquared.org.uk, andrew-ct.chen@mediatek.com, yong.deng@magewell.com, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Subject: [PATCH RFC 2/2] dt-bindings: add binding documentation for Allwinner CSI Date: Tue, 27 Jun 2017 19:07:34 +0800 Message-Id: <1498561654-14658-3-git-send-email-yong.deng@magewell.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1498561654-14658-1-git-send-email-yong.deng@magewell.com> References: <1498561654-14658-1-git-send-email-yong.deng@magewell.com> Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add binding documentation for Allwinner CSI. Signed-off-by: Yong Deng --- .../devicetree/bindings/media/sunxi-csi.txt | 51 ++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/sunxi-csi.txt diff --git a/Documentation/devicetree/bindings/media/sunxi-csi.txt b/Documentation/devicetree/bindings/media/sunxi-csi.txt new file mode 100644 index 0000000..770be0e --- /dev/null +++ b/Documentation/devicetree/bindings/media/sunxi-csi.txt @@ -0,0 +1,51 @@ +Allwinner V3s Camera Sensor Interface +------------------------------ + +Required properties: + - compatible: value must be "allwinner,sun8i-v3s-csi" + - reg: base address and size of the memory-mapped region. + - interrupts: interrupt associated to this IP + - clocks: phandles to the clocks feeding the CSI + * ahb: the CSI interface clock + * mod: the CSI module clock + * ram: the CSI DRAM clock + - clock-names: the clock names mentioned above + - resets: phandles to the reset line driving the CSI + +- ports: A ports node with endpoint definitions as defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. The + first port should be the input endpoints, the second one the outputs + +Example: + + csi1: csi@01cb4000 { + compatible = "allwinner,sun8i-v3s-csi"; + reg = <0x01cb4000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_CSI>, + <&ccu CLK_CSI1_SCLK>, + <&ccu CLK_DRAM_CSI>; + clock-names = "ahb", "mod", "ram"; + resets = <&ccu RST_BUS_CSI>; + + port { + #address-cells = <1>; + #size-cells = <0>; + + /* Parallel bus endpoint */ + csi1_0: endpoint@0 { + reg = <0>; + remote = <&adv7611_1>; + bus-width = <16>; + data-shift = <0>; + + /* If hsync-active/vsync-active are missing, + embedded BT.656 sync is used */ + hsync-active = <0>; /* Active low */ + vsync-active = <0>; /* Active low */ + data-active = <1>; /* Active high */ + pclk-sample = <1>; /* Rising */ + }; + }; + }; +