From patchwork Wed Aug 2 03:19:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacob Chen X-Patchwork-Id: 9875841 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 202D96038F for ; Wed, 2 Aug 2017 03:20:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1B83C28767 for ; Wed, 2 Aug 2017 03:20:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0F1CD2876E; Wed, 2 Aug 2017 03:20:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.4 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8D7ED28767 for ; Wed, 2 Aug 2017 03:20:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751894AbdHBDUf (ORCPT ); Tue, 1 Aug 2017 23:20:35 -0400 Received: from mail-pf0-f195.google.com ([209.85.192.195]:34651 "EHLO mail-pf0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751562AbdHBDU3 (ORCPT ); Tue, 1 Aug 2017 23:20:29 -0400 Received: by mail-pf0-f195.google.com with SMTP id t86so4617012pfe.1; Tue, 01 Aug 2017 20:20:29 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=iiK24dB5RA8H0IA7ijj6iYrNRFba2gbMMLYQnD5DSMk=; b=feyvwEfuxQcck6S+018q9++YvARQTL8yZ8IBVcHbOFfPnB1W4+4xT8Fg++AlmR+jNC feRHPcqEbUL/IMklE0s/r9A557q8BvLMu1hN93N6VDQUzC2v3QlyquerpCHNFba6i/lM 9/c6TZeZF2vt/VGp3E/KqRGBBMY9BJfISBWXJ+PNtor0JTPLiV9bYJGmBjwd4O3ghtQB lK8EYXYSSRx4bUK3iRhM2rNm1YyxjKLyYeR4Ea4c2hVejnV2xX8pM+6+/uDi/AzTS6zZ eGBg3wwtXnzAfmx/G3umfAMLhTXErHjWV27gO4lGzEJE/oixoJzviDoIjNq6CIdwgMIv ToNw== X-Gm-Message-State: AIVw113bRAIyBaMQJ3sIX71qlg4KgK0Ai37WzcE7f0xSxuK2pj2hWFbt 1zyTDuTkUHr8cg== X-Received: by 10.98.78.6 with SMTP id c6mr21476338pfb.307.1501644029221; Tue, 01 Aug 2017 20:20:29 -0700 (PDT) Received: from localhost.localdomain ([103.29.142.67]) by smtp.gmail.com with ESMTPSA id x29sm11973268pff.2.2017.08.01.20.20.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 01 Aug 2017 20:20:28 -0700 (PDT) From: Jacob Chen To: linux-rockchip@lists.infradead.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, heiko@sntech.de, robh+dt@kernel.org, mchehab@kernel.org, linux-media@vger.kernel.org, laurent.pinchart+renesas@ideasonboard.com, hans.verkuil@cisco.com, tfiga@chromium.org, nicolas@ndufresne.ca, Jacob Chen , Yakir Yang Subject: [PATCH v5 5/6] ARM: dts: rockchip: add RGA device node for RK3399 Date: Wed, 2 Aug 2017 11:19:46 +0800 Message-Id: <1501643987-27847-6-git-send-email-jacob-chen@iotwrt.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1501643987-27847-1-git-send-email-jacob-chen@iotwrt.com> References: <1501643987-27847-1-git-send-email-jacob-chen@iotwrt.com> Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch add the RGA dt config of RK3399 SoC. Signed-off-by: Jacob Chen Signed-off-by: Yakir Yang --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 8e6d1bd..0133a5f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1056,6 +1056,17 @@ status = "disabled"; }; + rga: rga@ff680000 { + compatible = "rockchip,rk3399-rga"; + reg = <0x0 0xff680000 0x0 0x10000>; + interrupts = ; + clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>; + clock-names = "aclk", "hclk", "sclk"; + resets = <&cru SRST_RGA_CORE>, <&cru SRST_A_RGA>, <&cru SRST_H_RGA>; + reset-names = "core", "axi", "ahb"; + power-domains = <&power RK3399_PD_RGA>; + }; + efuse0: efuse@ff690000 { compatible = "rockchip,rk3399-efuse"; reg = <0x0 0xff690000 0x0 0x80>;