From patchwork Wed Oct 18 03:54:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhi, Yong" X-Patchwork-Id: 10013415 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A8D8260215 for ; Wed, 18 Oct 2017 03:55:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 94B2C28A9B for ; Wed, 18 Oct 2017 03:55:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 89CD728A9C; Wed, 18 Oct 2017 03:55:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D31A42892E for ; Wed, 18 Oct 2017 03:55:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758842AbdJRDzN (ORCPT ); Tue, 17 Oct 2017 23:55:13 -0400 Received: from mga04.intel.com ([192.55.52.120]:23748 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755570AbdJRDzK (ORCPT ); Tue, 17 Oct 2017 23:55:10 -0400 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Oct 2017 20:55:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.43,394,1503385200"; d="scan'208";a="131629" Received: from mssathyx-mobl1.amr.corp.intel.com (HELO yzhi-desktop.amr.corp.intel.com) ([10.254.125.146]) by orsmga002.jf.intel.com with ESMTP; 17 Oct 2017 20:55:08 -0700 From: Yong Zhi To: linux-media@vger.kernel.org, sakari.ailus@linux.intel.com Cc: jian.xu.zheng@intel.com, rajmohan.mani@intel.com, tuukka.toivonen@intel.com, jerry.w.hu@intel.com, Yong Zhi , Tomasz Figa Subject: [PATCH v4 06/12] intel-ipu3: css: imgu dma buff pool Date: Tue, 17 Oct 2017 22:54:51 -0500 Message-Id: <1508298896-26096-3-git-send-email-yong.zhi@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1508298896-26096-1-git-send-email-yong.zhi@intel.com> References: <1508298896-26096-1-git-send-email-yong.zhi@intel.com> Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The pools are used to store previous parameters set by user with the parameter queue. Due to pipelining, there needs to be multiple sets (up to four) of parameters which are queued in a host-to-sp queue. Signed-off-by: Yong Zhi Signed-off-by: Tomasz Figa --- drivers/media/pci/intel/ipu3/ipu3-css-pool.c | 132 +++++++++++++++++++++++++++ drivers/media/pci/intel/ipu3/ipu3-css-pool.h | 54 +++++++++++ 2 files changed, 186 insertions(+) create mode 100644 drivers/media/pci/intel/ipu3/ipu3-css-pool.c create mode 100644 drivers/media/pci/intel/ipu3/ipu3-css-pool.h diff --git a/drivers/media/pci/intel/ipu3/ipu3-css-pool.c b/drivers/media/pci/intel/ipu3/ipu3-css-pool.c new file mode 100644 index 000000000000..d08e2a8b68ed --- /dev/null +++ b/drivers/media/pci/intel/ipu3/ipu3-css-pool.c @@ -0,0 +1,132 @@ +/* + * Copyright (c) 2017 Intel Corporation. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include + +#include "ipu3-css-pool.h" +#include "ipu3-dmamap.h" + +int ipu3_css_dma_alloc(struct device *dev, + struct ipu3_css_map *map, size_t size) +{ + struct imgu_device *imgu = dev_get_drvdata(dev); + + if (size == 0) { + map->vaddr = NULL; + return 0; + } + + if (!ipu3_dmamap_alloc(imgu, map, size)) + return -ENOMEM; + + return 0; +} + +void ipu3_css_dma_free(struct device *dev, struct ipu3_css_map *map) +{ + struct imgu_device *imgu = dev_get_drvdata(dev); + + ipu3_dmamap_free(imgu, map); +} + +void ipu3_css_pool_cleanup(struct device *dev, struct ipu3_css_pool *pool) +{ + int i; + + for (i = 0; i < IPU3_CSS_POOL_SIZE; i++) + ipu3_css_dma_free(dev, &pool->entry[i].param); +} + +int ipu3_css_pool_init(struct device *dev, struct ipu3_css_pool *pool, + int size) +{ + int i; + + for (i = 0; i < IPU3_CSS_POOL_SIZE; i++) { + pool->entry[i].framenum = INT_MIN; + if (ipu3_css_dma_alloc(dev, &pool->entry[i].param, size)) + goto fail; + } + + pool->last = IPU3_CSS_POOL_SIZE; + + return 0; + +fail: + ipu3_css_pool_cleanup(dev, pool); + return -ENOMEM; +} + +/* + * Check that the following call to pool_get succeeds. + * Return negative on error. + */ +static int ipu3_css_pool_check(struct ipu3_css_pool *pool, long framenum) +{ + /* Get the oldest entry */ + int n = (pool->last + 1) % IPU3_CSS_POOL_SIZE; + + /* + * pool->entry[n].framenum stores the frame number where that + * entry was allocated. If that was allocated more than POOL_SIZE + * frames back, it is old enough that we know it is no more in + * use by firmware. + */ + if (pool->entry[n].framenum + IPU3_CSS_POOL_SIZE > framenum) + return -ENOSPC; + + return n; +} + +/* + * Allocate a new parameter from pool at frame number `framenum'. + * Release the oldest entry in the pool to make space for the new entry. + * Return negative on error. + */ +int ipu3_css_pool_get(struct ipu3_css_pool *pool, long framenum) +{ + int n = ipu3_css_pool_check(pool, framenum); + + if (n < 0) + return n; + + pool->entry[n].framenum = framenum; + pool->last = n; + + return n; +} + +/* + * Undo, for all practical purposes, the effect of pool_get(). + */ +void ipu3_css_pool_put(struct ipu3_css_pool *pool) +{ + pool->entry[pool->last].framenum = INT_MIN; + pool->last = (pool->last + IPU3_CSS_POOL_SIZE - 1) % IPU3_CSS_POOL_SIZE; +} + +const struct ipu3_css_map * +ipu3_css_pool_last(struct ipu3_css_pool *pool, unsigned int n) +{ + static const struct ipu3_css_map null_map = { 0 }; + int i = (pool->last + IPU3_CSS_POOL_SIZE - n) % IPU3_CSS_POOL_SIZE; + + WARN_ON(n >= IPU3_CSS_POOL_SIZE); + + if (pool->entry[i].framenum < 0) + return &null_map; + + return &pool->entry[i].param; +} diff --git a/drivers/media/pci/intel/ipu3/ipu3-css-pool.h b/drivers/media/pci/intel/ipu3/ipu3-css-pool.h new file mode 100644 index 000000000000..9b6ac14acfb2 --- /dev/null +++ b/drivers/media/pci/intel/ipu3/ipu3-css-pool.h @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2017 Intel Corporation. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __IPU3_UTIL_H +#define __IPU3_UTIL_H + +#include + +#define sqr(x) ((x) * (x)) +#define DIV_ROUND_CLOSEST_DOWN(a, b) (((a) + (b / 2) - 1) / (b)) +#define roundclosest_down(a, b) (DIV_ROUND_CLOSEST_DOWN(a, b) * (b)) +#define roundclosest(n, di) \ + ({ typeof(n) __n = (n); typeof(di) __di = (di); \ + DIV_ROUND_CLOSEST(__n, __di) * __di; }) + +#define IPU3_CSS_POOL_SIZE 4 + +struct ipu3_css_map { + size_t size; + void *vaddr; + dma_addr_t daddr; + struct vm_struct *vma; +}; + +struct ipu3_css_pool { + struct { + struct ipu3_css_map param; + long framenum; + } entry[IPU3_CSS_POOL_SIZE]; + unsigned int last; /* Latest entry */ +}; + +int ipu3_css_dma_alloc(struct device *dev, struct ipu3_css_map *map, + size_t size); +void ipu3_css_dma_free(struct device *dev, struct ipu3_css_map *map); +void ipu3_css_pool_cleanup(struct device *dev, struct ipu3_css_pool *pool); +int ipu3_css_pool_init(struct device *dev, struct ipu3_css_pool *pool, + int size); +int ipu3_css_pool_get(struct ipu3_css_pool *pool, long framenum); +void ipu3_css_pool_put(struct ipu3_css_pool *pool); +const struct ipu3_css_map *ipu3_css_pool_last(struct ipu3_css_pool *pool, + unsigned int last); + +#endif