From patchwork Wed Apr 25 16:40:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhi, Yong" X-Patchwork-Id: 10363913 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CA9BA6038F for ; Wed, 25 Apr 2018 16:39:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B813F223C7 for ; Wed, 25 Apr 2018 16:39:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id ACA6B22B39; Wed, 25 Apr 2018 16:39:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1FB4F223C7 for ; Wed, 25 Apr 2018 16:39:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755340AbeDYQjP (ORCPT ); Wed, 25 Apr 2018 12:39:15 -0400 Received: from mga07.intel.com ([134.134.136.100]:48861 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755523AbeDYQjL (ORCPT ); Wed, 25 Apr 2018 12:39:11 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Apr 2018 09:39:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,327,1520924400"; d="scan'208";a="45994205" Received: from yzhi-z87x-ud5h.jf.intel.com ([134.134.152.173]) by orsmga003.jf.intel.com with ESMTP; 25 Apr 2018 09:39:10 -0700 From: Yong Zhi To: linux-media@vger.kernel.org, sakari.ailus@linux.intel.com Cc: tfiga@chromium.org, rajmohan.mani@intel.com, tuukka.toivonen@intel.com, tian.shu.qiu@intel.com, Bingbu Cao , Andy Yeh , Yong Zhi Subject: [PATCH] media: intel-ipu3: cio2: Handle IRQs until INT_STS is cleared Date: Wed, 25 Apr 2018 09:40:15 -0700 Message-Id: <1524674415-11598-1-git-send-email-yong.zhi@intel.com> X-Mailer: git-send-email 2.7.4 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Bingbu Cao Interrupt behavior shows that some time the frame end and frame start of next frame is unstable and can range from several to hundreds of micro-sec. In the case of ~10us, isr may not clear next sof interrupt status in single handling, which prevents new interrupts from coming. Fix this by handling all pending IRQs before exiting isr, so any abnormal behavior results from very short interrupt status changes is protected. Signed-off-by: Andy Yeh Signed-off-by: Bingbu Cao Signed-off-by: Yong Zhi Reviewed-by: Tomasz Figa --- drivers/media/pci/intel/ipu3/ipu3-cio2.c | 32 ++++++++++++++++++++++---------- 1 file changed, 22 insertions(+), 10 deletions(-) diff --git a/drivers/media/pci/intel/ipu3/ipu3-cio2.c b/drivers/media/pci/intel/ipu3/ipu3-cio2.c index 7d768ec..2902715 100644 --- a/drivers/media/pci/intel/ipu3/ipu3-cio2.c +++ b/drivers/media/pci/intel/ipu3/ipu3-cio2.c @@ -640,18 +640,10 @@ static const char *const cio2_port_errs[] = { "PKT2LONG", }; -static irqreturn_t cio2_irq(int irq, void *cio2_ptr) +static void cio2_irq_handle_once(struct cio2_device *cio2, u32 int_status) { - struct cio2_device *cio2 = cio2_ptr; void __iomem *const base = cio2->base; struct device *dev = &cio2->pci_dev->dev; - u32 int_status, int_clear; - - int_status = readl(base + CIO2_REG_INT_STS); - int_clear = int_status; - - if (!int_status) - return IRQ_NONE; if (int_status & CIO2_INT_IOOE) { /* @@ -770,9 +762,29 @@ static irqreturn_t cio2_irq(int irq, void *cio2_ptr) int_status &= ~(CIO2_INT_IOIE | CIO2_INT_IOIRQ); } - writel(int_clear, base + CIO2_REG_INT_STS); if (int_status) dev_warn(dev, "unknown interrupt 0x%x on INT\n", int_status); +} + +static irqreturn_t cio2_irq(int irq, void *cio2_ptr) +{ + struct cio2_device *cio2 = cio2_ptr; + void __iomem *const base = cio2->base; + struct device *dev = &cio2->pci_dev->dev; + u32 int_status; + + int_status = readl(base + CIO2_REG_INT_STS); + dev_dbg(dev, "isr enter - interrupt status 0x%x\n", int_status); + if (!int_status) + return IRQ_NONE; + + do { + writel(int_status, base + CIO2_REG_INT_STS); + cio2_irq_handle_once(cio2, int_status); + int_status = readl(base + CIO2_REG_INT_STS); + if (int_status) + dev_dbg(dev, "pending status 0x%x\n", int_status); + } while (int_status); return IRQ_HANDLED; }