@@ -28,6 +28,29 @@
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x38000000>;
};
+
+ cvbs-in {
+ compatible = "composite-video-connector";
+ label = "CVBS IN";
+
+ port {
+ cvbs_con: endpoint {
+ remote-endpoint = <&adv7482_ain7>;
+ };
+ };
+ };
+
+ hdmi-in {
+ compatible = "hdmi-connector";
+ label = "HDMI IN";
+ type = "a";
+
+ port {
+ hdmi_in_con: endpoint {
+ remote-endpoint = <&adv7482_hdmi>;
+ };
+ };
+ };
};
&avb {
@@ -47,6 +70,22 @@
};
};
+&csi40 {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+
+ csi40_in: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ remote-endpoint = <&adv7482_txa>;
+ };
+ };
+ };
+};
+
&ehci0 {
status = "okay";
};
@@ -55,6 +94,49 @@
clock-frequency = <48000000>;
};
+&i2c0 {
+ status = "okay";
+
+ video-receiver@70 {
+ compatible = "adi,adv7482";
+ reg = <0x70>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ interrupt-parent = <&gpio0>;
+ interrupt-names = "intrq1", "intrq2";
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>,
+ <17 IRQ_TYPE_LEVEL_LOW>;
+
+ port@7 {
+ reg = <7>;
+
+ adv7482_ain7: endpoint {
+ remote-endpoint = <&cvbs_con>;
+ };
+ };
+
+ port@8 {
+ reg = <8>;
+
+ adv7482_hdmi: endpoint {
+ remote-endpoint = <&hdmi_in_con>;
+ };
+ };
+
+ port@a {
+ reg = <0xa>;
+
+ adv7482_txa: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ remote-endpoint = <&csi40_in>;
+ };
+ };
+ };
+};
+
&ohci0 {
status = "okay";
};
@@ -94,6 +176,10 @@
status = "okay";
};
+&vin4 {
+ status = "okay";
+};
+
&xhci0 {
pinctrl-0 = <&usb30_pins>;
pinctrl-names = "default";
Add HDMI and CVBS inputs device nodes to R-Car E3 Ebisu board. Both HDMI and CVBS inputs are connected to an ADV7482 video decoder hooked to the SoC CSI-2 receiver port. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> --- The upported BSP patch: https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas-bsp.git/commit/?id=97287065b27d987f96a33bfbbd52586ac091ee6d described the ADV7482 output as 'adv7482_txa_cp' and 'adv7482_txa_sd'. This seems wrong to me, as per Ebisu's schematics, the TXA output channel is a single one and it is routed to CSI40 input. The BSP patch connects two endpoints, with differente 'data-lanes' values to the same CSI input, and this seems odd to me. There is an issue here that the mainline ADV748x drivers does not support dynamic routing, and thus HDMI is always routed to TXA and analogue inputs to TXB, but that's a separate issue and DTS should only describe which connections are in place in the board, so I didn't include the adv748x's 'port@11' defined in the BSP patch (which is also wrong as it should be port@b, and the 11th port described TXB, not a different input routing to port@a). Please have a look and confirm my understanding. Thanks j --- arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts | 86 ++++++++++++++++++++++++++ 1 file changed, 86 insertions(+) -- 2.7.4