From patchwork Wed Oct 17 19:37:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacopo Mondi X-Patchwork-Id: 10646033 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6A3773B73 for ; Wed, 17 Oct 2018 19:37:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5A5F128751 for ; Wed, 17 Oct 2018 19:37:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4E7CA28750; Wed, 17 Oct 2018 19:37:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DE3A628751 for ; Wed, 17 Oct 2018 19:37:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728393AbeJRDeo (ORCPT ); Wed, 17 Oct 2018 23:34:44 -0400 Received: from relay10.mail.gandi.net ([217.70.178.230]:56421 "EHLO relay10.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728129AbeJRDen (ORCPT ); Wed, 17 Oct 2018 23:34:43 -0400 Received: from w540.lan (2-224-242-101.ip172.fastwebnet.it [2.224.242.101]) (Authenticated sender: jacopo@jmondi.org) by relay10.mail.gandi.net (Postfix) with ESMTPSA id 38FF3240008; Wed, 17 Oct 2018 19:37:30 +0000 (UTC) From: Jacopo Mondi To: maxime.ripard@bootlin.com, sam@elite-embedded.com, mchehab@kernel.org Cc: Jacopo Mondi , laurent.pinchart@ideasonboard.com, hans.verkuil@cisco.com, sakari.ailus@linux.intel.com, linux-media@vger.kernel.org, hugues.fruchet@st.com, loic.poulain@linaro.org, daniel@zonque.org Subject: [PATCH 1/2] media: ov5640: Add check for PLL1 output max frequency Date: Wed, 17 Oct 2018 21:37:17 +0200 Message-Id: <1539805038-22321-2-git-send-email-jacopo+renesas@jmondi.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1539805038-22321-1-git-send-email-jacopo+renesas@jmondi.org> References: <1539805038-22321-1-git-send-email-jacopo+renesas@jmondi.org> Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Check that the PLL1 output frequency does not exceed the maximum allowed 1GHz frequency. Signed-off-by: Jacopo Mondi --- drivers/media/i2c/ov5640.c | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/drivers/media/i2c/ov5640.c b/drivers/media/i2c/ov5640.c index e098435..1f2e72d 100644 --- a/drivers/media/i2c/ov5640.c +++ b/drivers/media/i2c/ov5640.c @@ -770,7 +770,7 @@ static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg, * always set to either 1 or 2 in the vendor kernels. */ #define OV5640_SYSDIV_MIN 1 -#define OV5640_SYSDIV_MAX 2 +#define OV5640_SYSDIV_MAX 16 /* * This is supposed to be ranging from 1 to 16, but the value is always @@ -806,15 +806,20 @@ static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg, * This is supposed to be ranging from 1 to 8, but the value is always * set to 1 in the vendor kernels. */ -#define OV5640_PCLK_ROOT_DIV 1 +#define OV5640_PCLK_ROOT_DIV 1 +#define OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS 0x00 static unsigned long ov5640_compute_sys_clk(struct ov5640_dev *sensor, u8 pll_prediv, u8 pll_mult, u8 sysdiv) { - unsigned long rate = clk_get_rate(sensor->xclk); + unsigned long sysclk = sensor->xclk_freq / pll_prediv * pll_mult; - return rate / pll_prediv * pll_mult / sysdiv; + /* PLL1 output cannot exceed 1GHz. */ + if (sysclk / 1000000 > 1000) + return 0; + + return sysclk / sysdiv; } static unsigned long ov5640_calc_sys_clk(struct ov5640_dev *sensor, @@ -844,6 +849,16 @@ static unsigned long ov5640_calc_sys_clk(struct ov5640_dev *sensor, _rate = ov5640_compute_sys_clk(sensor, OV5640_PLL_PREDIV, _pll_mult, _sysdiv); + + /* + * We have reached the maximum allowed PLL1 output, + * increase sysdiv. + */ + if (rate == 0) { + _pll_mult = OV5640_PLL_MULT_MAX + 1; + continue; + } + if (abs(rate - _rate) < abs(rate - best)) { best = _rate; best_sysdiv = _sysdiv;