From patchwork Wed Jul 15 04:20:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sowjanya Komatineni X-Patchwork-Id: 11664129 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A8431913 for ; Wed, 15 Jul 2020 04:20:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 90291207F5 for ; Wed, 15 Jul 2020 04:20:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="EagUyXsE" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728806AbgGOEUI (ORCPT ); Wed, 15 Jul 2020 00:20:08 -0400 Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:9602 "EHLO hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728478AbgGOETk (ORCPT ); Wed, 15 Jul 2020 00:19:40 -0400 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Tue, 14 Jul 2020 21:17:46 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Tue, 14 Jul 2020 21:19:39 -0700 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Tue, 14 Jul 2020 21:19:39 -0700 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 15 Jul 2020 04:19:39 +0000 Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Wed, 15 Jul 2020 04:19:39 +0000 Received: from skomatineni-linux.nvidia.com (Not Verified[10.2.160.169]) by rnnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Tue, 14 Jul 2020 21:19:38 -0700 From: Sowjanya Komatineni To: , , , , , , , CC: , , , , , , , Subject: [RFC PATCH v3 15/18] gpu: host1x: mipi: Use readl_relaxed_poll_timeout in tegra_mipi_wait Date: Tue, 14 Jul 2020 21:20:52 -0700 Message-ID: <1594786855-26506-16-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1594786855-26506-1-git-send-email-skomatineni@nvidia.com> References: <1594786855-26506-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1594786666; bh=OrA56lLocgK9NzCJgW1OH13QXVaE/JCoai+p9SudmJM=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=EagUyXsE4GMVuPsntbJiXG3xrszqGUU+vvJPtKF6z8xFdQbeMP6YtaTGIfslblg9g Ay6PkUk5h9UcorGLN7CwC6ccJ+8VofSHlRiew9ls9mHV0W/+c1mskBQZNZNE0fbZxV /bdIPL/o2MgnZRXPNO2sSrS9av/ebTn57GlcySbqWNHOAyhAWq6BnTXc1PXRIRlgDw lJoNHGNnd6atAPF2x/4cxdAmXFq+nIoQDqy5SJjJrhMa28p5t2y2Uoce8bZh94s1PR Lg7hDeBcXBkEmOvqY4xMbVcMBoOhVH7wWWfVpMFJjy2q3CeMB4/gT7x9mTirjIl/O4 ztHF1t/jb7OWA== Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Use readl_relaxed_poll_timeout() in tegra_mipi_wait() to simplify the code. Signed-off-by: Sowjanya Komatineni --- drivers/gpu/host1x/mipi.c | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/host1x/mipi.c b/drivers/gpu/host1x/mipi.c index 762d349..259e70c 100644 --- a/drivers/gpu/host1x/mipi.c +++ b/drivers/gpu/host1x/mipi.c @@ -21,9 +21,9 @@ */ #include -#include #include #include +#include #include #include #include @@ -295,19 +295,15 @@ EXPORT_SYMBOL(tegra_mipi_disable); static int tegra_mipi_wait(struct tegra_mipi *mipi) { - unsigned long timeout = jiffies + msecs_to_jiffies(250); + void __iomem *status_reg = mipi->regs + (MIPI_CAL_STATUS << 2); u32 value; + int err; - while (time_before(jiffies, timeout)) { - value = tegra_mipi_readl(mipi, MIPI_CAL_STATUS); - if ((value & MIPI_CAL_STATUS_ACTIVE) == 0 && - (value & MIPI_CAL_STATUS_DONE) != 0) - return 0; - - usleep_range(10, 50); - } - - return -ETIMEDOUT; + err = readl_relaxed_poll_timeout(status_reg, value, + !(value & MIPI_CAL_STATUS_ACTIVE) && + (value & MIPI_CAL_STATUS_DONE), 50, + 250000); + return err; } int tegra_mipi_calibrate(struct tegra_mipi_device *device)