@@ -51,7 +51,7 @@
#define OV2740_REG_MWB_R_GAIN 0x500a
#define OV2740_REG_MWB_G_GAIN 0x500c
#define OV2740_REG_MWB_B_GAIN 0x500e
-#define OV2740_DGTL_GAIN_MIN 0
+#define OV2740_DGTL_GAIN_MIN 1024
#define OV2740_DGTL_GAIN_MAX 4095
#define OV2740_DGTL_GAIN_STEP 1
#define OV2740_DGTL_GAIN_DEFAULT 1024
@@ -61,6 +61,12 @@
#define OV2740_TEST_PATTERN_ENABLE BIT(7)
#define OV2740_TEST_PATTERN_BAR_SHIFT 2
+/* Group Access */
+#define OV2740_REG_GROUP_ACCESS 0x3208
+#define OV2740_GROUP_HOLD_START 0x0
+#define OV2740_GROUP_HOLD_END 0x10
+#define OV2740_GROUP_HOLD_LAUNCH 0xa0
+
/* ISP CTRL00 */
#define OV2740_REG_ISP_CTRL00 0x5000
/* ISP CTRL01 */
@@ -438,6 +444,11 @@ static int ov2740_update_digital_gain(struct ov2740 *ov2740, u32 d_gain)
{
int ret = 0;
+ ret = ov2740_write_reg(ov2740, OV2740_REG_GROUP_ACCESS, 1,
+ OV2740_GROUP_HOLD_START);
+ if (ret)
+ return ret;
+
ret = ov2740_write_reg(ov2740, OV2740_REG_MWB_R_GAIN, 2, d_gain);
if (ret)
return ret;
@@ -446,7 +457,18 @@ static int ov2740_update_digital_gain(struct ov2740 *ov2740, u32 d_gain)
if (ret)
return ret;
- return ov2740_write_reg(ov2740, OV2740_REG_MWB_B_GAIN, 2, d_gain);
+ ret = ov2740_write_reg(ov2740, OV2740_REG_MWB_B_GAIN, 2, d_gain);
+ if (ret)
+ return ret;
+
+ ret = ov2740_write_reg(ov2740, OV2740_REG_GROUP_ACCESS, 1,
+ OV2740_GROUP_HOLD_END);
+ if (ret)
+ return ret;
+
+ ret = ov2740_write_reg(ov2740, OV2740_REG_GROUP_ACCESS, 1,
+ OV2740_GROUP_HOLD_LAUNCH);
+ return ret;
}
static int ov2740_test_pattern(struct ov2740 *ov2740, u32 pattern)
As the RGB digital gains of ov2740 were not applied as group, some artifacts were observed in low light environment, use group write for digital gain can make the RGB digital can be guaranteed to applied together at frame boundary. Signed-off-by: Bingbu Cao <bingbu.cao@intel.com> --- drivers/media/i2c/ov2740.c | 26 ++++++++++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-)