From patchwork Thu Mar 11 13:26:46 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mauro Carvalho Chehab X-Patchwork-Id: 84877 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o2BDRGVW031889 for ; Thu, 11 Mar 2010 13:27:16 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756763Ab0CKN1G (ORCPT ); Thu, 11 Mar 2010 08:27:06 -0500 Received: from mx1.redhat.com ([209.132.183.28]:20137 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756687Ab0CKN1C (ORCPT ); Thu, 11 Mar 2010 08:27:02 -0500 Received: from int-mx08.intmail.prod.int.phx2.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.21]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id o2BDR1nT024172 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Thu, 11 Mar 2010 08:27:02 -0500 Received: from pedra (vpn-234-51.phx2.redhat.com [10.3.234.51]) by int-mx08.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id o2BDQqf0015794 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 11 Mar 2010 08:27:01 -0500 Date: Thu, 11 Mar 2010 10:26:46 -0300 From: Mauro Carvalho Chehab To: linux-media@vger.kernel.org Subject: [PATCH 1/7] V4L/DVB: tm6000: Replace all Req 7 group of regs with another naming convention Message-ID: <20100311102646.5025589e@pedra> In-Reply-To: References: Mime-Version: 1.0 X-Scanned-By: MIMEDefang 2.67 on 10.5.11.21 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Thu, 11 Mar 2010 13:27:17 +0000 (UTC) diff --git a/drivers/staging/tm6000/tm6000-regs.h b/drivers/staging/tm6000/tm6000-regs.h index 9af4c06..321eb3f 100644 --- a/drivers/staging/tm6000/tm6000-regs.h +++ b/drivers/staging/tm6000/tm6000-regs.h @@ -98,186 +98,186 @@ enum { }; /* Define TM6000/TM6010 Video decoder registers */ -#define TM6000_VIDEO_CONTROL0 0x00 -#define TM6000_VIDEO_CONTROL1 0x01 -#define TM6000_VIDEO_CONTROL2 0x02 -#define TM6000_YC_SEP_CONTROL 0x03 -#define TM6000_LUMA_HAGC_CONTROL 0x04 -#define TM6000_NOISE_THRESHOLD 0x05 -#define TM6000_AGC_GATE_THRESHOLD 0x06 -#define TM6000_OUTPUT_CONTROL 0x07 -#define TM6000_LUMA_CONTRAST_ADJ 0x08 -#define TM6000_LUMA_BRIGHTNESS_ADJ 0x09 -#define TM6000_CHROMA_SATURATION_ADJ 0x0A -#define TM6000_CHROMA_HUE_PHASE_ADJ 0x0B -#define TM6000_CHROMA_AGC_CONTROL 0x0C -#define TM6000_CHROMA_KILL_LEVEL 0x0D -#define TM6000_CHROMA_AUTO_POSITION 0x0F -#define TM6000_AGC_PEAK_NOMINAL 0x10 -#define TM6000_AGC_PEAK_CONTROL 0x11 -#define TM6000_AGC_GATE_STARTH 0x12 -#define TM6000_AGC_GATE_STARTL 0x13 -#define TM6000_AGC_GATE_WIDTH 0x14 -#define TM6000_AGC_BP_DELAY 0x15 -#define TM6000_LOCK_COUNT 0x16 -#define TM6000_HLOOP_MAXSTATE 0x17 -#define TM6000_CHROMA_DTO_INCREMENT3 0x18 -#define TM6000_CHROMA_DTO_INCREMENT2 0x19 -#define TM6000_CHROMA_DTO_INCREMENT1 0x1A -#define TM6000_CHROMA_DTO_INCREMENT0 0x1B -#define TM6000_HSYNC_DTO_INCREMENT3 0x1C -#define TM6000_HSYNC_DTO_INCREMENT2 0x1D -#define TM6000_HSYNC_DTO_INCREMENT1 0x1E -#define TM6000_HSYNC_DTO_INCREMENT0 0x1F -#define TM6000_HSYNC_RISING_EDGE_TIME 0x20 -#define TM6000_HSYNC_PHASE_OFFSET 0x21 -#define TM6000_HSYNC_PLL_START_TIME 0x22 -#define TM6000_HSYNC_PLL_END_TIME 0x23 -#define TM6000_HSYNC_TIP_START_TIME 0x24 -#define TM6000_HSYNC_TIP_END_TIME 0x25 -#define TM6000_HSYNC_RISING_EDGE_START 0x26 -#define TM6000_HSYNC_RISING_EDGE_END 0x27 -#define TM6000_BACKPORCH_START 0x28 -#define TM6000_BACKPORCH_END 0x29 -#define TM6000_HSYNC_FILTER_START 0x2A -#define TM6000_HSYNC_FILTER_END 0x2B -#define TM6000_CHROMA_BURST_START 0x2C -#define TM6000_CHROMA_BURST_END 0x2D -#define TM6000_ACTIVE_VIDEO_HSTART 0x2E -#define TM6000_ACTIVE_VIDEO_HWIDTH 0x2F -#define TM6000_ACTIVE_VIDEO_VSTART 0x30 -#define TM6000_ACTIVE_VIDEO_VHIGHT 0x31 -#define TM6000_VSYNC_HLOCK_MIN 0x32 -#define TM6000_VSYNC_HLOCK_MAX 0x33 -#define TM6000_VSYNC_AGC_MIN 0x34 -#define TM6000_VSYNC_AGC_MAX 0x35 -#define TM6000_VSYNC_VBI_MIN 0x36 -#define TM6000_VSYNC_VBI_MAX 0x37 -#define TM6000_VSYNC_THRESHOLD 0x38 -#define TM6000_VSYNC_TIME_CONSTANT 0x39 -#define TM6000_STATUS1 0x3A -#define TM6000_STATUS2 0x3B -#define TM6000_STATUS3 0x3C -#define TM6000_RESET 0x3F -#define TM6000_TELETEXT_VBI_CODE0 0x40 -#define TM6000_TELETEXT_VBI_CODE1 0x41 -#define TM6000_VBI_DATA_HIGH_LEVEL 0x42 -#define TM6000_VBI_DATA_TYPE_LINE7 0x43 -#define TM6000_VBI_DATA_TYPE_LINE8 0x44 -#define TM6000_VBI_DATA_TYPE_LINE9 0x45 -#define TM6000_VBI_DATA_TYPE_LINE10 0x46 -#define TM6000_VBI_DATA_TYPE_LINE11 0x47 -#define TM6000_VBI_DATA_TYPE_LINE12 0x48 -#define TM6000_VBI_DATA_TYPE_LINE13 0x49 -#define TM6000_VBI_DATA_TYPE_LINE14 0x4A -#define TM6000_VBI_DATA_TYPE_LINE15 0x4B -#define TM6000_VBI_DATA_TYPE_LINE16 0x4C -#define TM6000_VBI_DATA_TYPE_LINE17 0x4D -#define TM6000_VBI_DATA_TYPE_LINE18 0x4E -#define TM6000_VBI_DATA_TYPE_LINE19 0x4F -#define TM6000_VBI_DATA_TYPE_LINE20 0x50 -#define TM6000_VBI_DATA_TYPE_LINE21 0x51 -#define TM6000_VBI_DATA_TYPE_LINE22 0x52 -#define TM6000_VBI_DATA_TYPE_LINE23 0x53 -#define TM6000_VBI_DATA_TYPE_RLINES 0x54 -#define TM6000_VBI_LOOP_FILTER_GAIN 0x55 -#define TM6000_VBI_LOOP_FILTER_I_GAIN 0x56 -#define TM6000_VBI_LOOP_FILTER_P_GAIN 0x57 -#define TM6000_VBI_CAPTION_DTO1 0x58 -#define TM6000_VBI_CAPTION_DTO0 0x59 -#define TM6000_VBI_TELETEXT_DTO1 0x5A -#define TM6000_VBI_TELETEXT_DTO0 0x5B -#define TM6000_VBI_WSS625_DTO1 0x5C -#define TM6000_VBI_WSS625_DTO0 0x5D -#define TM6000_VBI_CAPTION_FRAME_START 0x5E -#define TM6000_VBI_WSS625_FRAME_START 0x5F -#define TM6000_TELETEXT_FRAME_START 0x60 -#define TM6000_VBI_CCDATA1 0x61 -#define TM6000_VBI_CCDATA2 0x62 -#define TM6000_VBI_WSS625_DATA1 0x63 -#define TM6000_VBI_WSS625_DATA2 0x64 -#define TM6000_VBI_DATA_STATUS 0x65 -#define TM6000_VBI_CAPTION_START 0x66 -#define TM6000_VBI_WSS625_START 0x67 -#define TM6000_VBI_TELETEXT_START 0x68 -#define TM6000_HSYNC_DTO_INC_STATUS3 0x70 -#define TM6000_HSYNC_DTO_INC_STATUS2 0x71 -#define TM6000_HSYNC_DTO_INC_STATUS1 0x72 -#define TM6000_HSYNC_DTO_INC_STATUS0 0x73 -#define TM6000_CHROMA_DTO_INC_STATUS3 0x74 -#define TM6000_CHROMA_DTO_INC_STATUS2 0x75 -#define TM6000_CHROMA_DTO_INC_STATUS1 0x76 -#define TM6000_CHROMA_DTO_INC_STATUS0 0x77 -#define TM6000_AGC_AGAIN_STATUS 0x78 -#define TM6000_AGC_DGAIN_STATUS 0x79 -#define TM6000_CHROMA_MAG_STATUS 0x7A -#define TM6000_CHROMA_GAIN_STATUS1 0x7B -#define TM6000_CHROMA_GAIN_STATUS0 0x7C -#define TM6000_CORDIC_FREQ_STATUS 0x7D -#define TM6000_STATUS_NOISE 0x7F -#define TM6000_COMB_FILTER_TRESHOLD 0x80 -#define TM6000_COMB_FILTER_CONFIG 0x82 -#define TM6000_CHROMA_LOCK_CONFIG 0x83 -#define TM6000_NOISE_NTSC_C 0x84 -#define TM6000_NOISE_PAL_C 0x85 -#define TM6000_NOISE_PHASE_C 0x86 -#define TM6000_NOISE_PHASE_Y 0x87 -#define TM6000_CHROMA_LOOPFILTER_STATE 0x8A -#define TM6000_CHROMA_HRESAMPLER 0x8B -#define TM6000_CPUMP_DELAY_ADJ 0x8D -#define TM6000_CPUMP_ADJ 0x8E -#define TM6000_CPUMP_DELAY 0x8F +#define TM6010_REQ07_R00_VIDEO_CONTROL0 0x00 +#define TM6010_REQ07_R01_VIDEO_CONTROL1 0x01 +#define TM6010_REQ07_R02_VIDEO_CONTROL2 0x02 +#define TM6010_REQ07_R03_YC_SEP_CONTROL 0x03 +#define TM6010_REQ07_R04_LUMA_HAGC_CONTROL 0x04 +#define TM6010_REQ07_R05_NOISE_THRESHOLD 0x05 +#define TM6010_REQ07_R06_AGC_GATE_THRESHOLD 0x06 +#define TM6010_REQ07_R07_OUTPUT_CONTROL 0x07 +#define TM6010_REQ07_R08_LUMA_CONTRAST_ADJ 0x08 +#define TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ 0x09 +#define TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ 0x0A +#define TM6010_REQ07_R0B_CHROMA_HUE_PHASE_ADJ 0x0B +#define TM6010_REQ07_R0C_CHROMA_AGC_CONTROL 0x0C +#define TM6010_REQ07_R0D_CHROMA_KILL_LEVEL 0x0D +#define TM6010_REQ07_R0F_CHROMA_AUTO_POSITION 0x0F +#define TM6010_REQ07_R10_AGC_PEAK_NOMINAL 0x10 +#define TM6010_REQ07_R11_AGC_PEAK_CONTROL 0x11 +#define TM6010_REQ07_R12_AGC_GATE_STARTH 0x12 +#define TM6010_REQ07_R13_AGC_GATE_STARTL 0x13 +#define TM6010_REQ07_R14_AGC_GATE_WIDTH 0x14 +#define TM6010_REQ07_R15_AGC_BP_DELAY 0x15 +#define TM6010_REQ07_R16_LOCK_COUNT 0x16 +#define TM6010_REQ07_R17_HLOOP_MAXSTATE 0x17 +#define TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3 0x18 +#define TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2 0x19 +#define TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1 0x1A +#define TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0 0x1B +#define TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3 0x1C +#define TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2 0x1D +#define TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1 0x1E +#define TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0 0x1F +#define TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME 0x20 +#define TM6010_REQ07_R21_HSYNC_PHASE_OFFSET 0x21 +#define TM6010_REQ07_R22_HSYNC_PLL_START_TIME 0x22 +#define TM6010_REQ07_R23_HSYNC_PLL_END_TIME 0x23 +#define TM6010_REQ07_R24_HSYNC_TIP_START_TIME 0x24 +#define TM6010_REQ07_R25_HSYNC_TIP_END_TIME 0x25 +#define TM6010_REQ07_R26_HSYNC_RISING_EDGE_START 0x26 +#define TM6010_REQ07_R27_HSYNC_RISING_EDGE_END 0x27 +#define TM6010_REQ07_R28_BACKPORCH_START 0x28 +#define TM6010_REQ07_R29_BACKPORCH_END 0x29 +#define TM6010_REQ07_R2A_HSYNC_FILTER_START 0x2A +#define TM6010_REQ07_R2B_HSYNC_FILTER_END 0x2B +#define TM6010_REQ07_R2C_CHROMA_BURST_START 0x2C +#define TM6010_REQ07_R2D_CHROMA_BURST_END 0x2D +#define TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART 0x2E +#define TM6010_REQ07_R2F_ACTIVE_VIDEO_HWIDTH 0x2F +#define TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART 0x30 +#define TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT 0x31 +#define TM6010_REQ07_R32_VSYNC_HLOCK_MIN 0x32 +#define TM6010_REQ07_R33_VSYNC_HLOCK_MAX 0x33 +#define TM6010_REQ07_R34_VSYNC_AGC_MIN 0x34 +#define TM6010_REQ07_R35_VSYNC_AGC_MAX 0x35 +#define TM6010_REQ07_R36_VSYNC_VBI_MIN 0x36 +#define TM6010_REQ07_R37_VSYNC_VBI_MAX 0x37 +#define TM6010_REQ07_R38_VSYNC_THRESHOLD 0x38 +#define TM6010_REQ07_R39_VSYNC_TIME_CONSTANT 0x39 +#define TM6010_REQ07_R3A_STATUS1 0x3A +#define TM6010_REQ07_R3B_STATUS2 0x3B +#define TM6010_REQ07_R3C_STATUS3 0x3C +#define TM6010_REQ07_R3F_RESET 0x3F +#define TM6010_REQ07_R40_TELETEXT_VBI_CODE0 0x40 +#define TM6010_REQ07_R41_TELETEXT_VBI_CODE1 0x41 +#define TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL 0x42 +#define TM6010_REQ07_R43_VBI_DATA_TYPE_LINE7 0x43 +#define TM6010_REQ07_R44_VBI_DATA_TYPE_LINE8 0x44 +#define TM6010_REQ07_R45_VBI_DATA_TYPE_LINE9 0x45 +#define TM6010_REQ07_R46_VBI_DATA_TYPE_LINE10 0x46 +#define TM6010_REQ07_R47_VBI_DATA_TYPE_LINE11 0x47 +#define TM6010_REQ07_R48_VBI_DATA_TYPE_LINE12 0x48 +#define TM6010_REQ07_R49_VBI_DATA_TYPE_LINE13 0x49 +#define TM6010_REQ07_R4A_VBI_DATA_TYPE_LINE14 0x4A +#define TM6010_REQ07_R4B_VBI_DATA_TYPE_LINE15 0x4B +#define TM6010_REQ07_R4C_VBI_DATA_TYPE_LINE16 0x4C +#define TM6010_REQ07_R4D_VBI_DATA_TYPE_LINE17 0x4D +#define TM6010_REQ07_R4E_VBI_DATA_TYPE_LINE18 0x4E +#define TM6010_REQ07_R4F_VBI_DATA_TYPE_LINE19 0x4F +#define TM6010_REQ07_R50_VBI_DATA_TYPE_LINE20 0x50 +#define TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21 0x51 +#define TM6010_REQ07_R52_VBI_DATA_TYPE_LINE22 0x52 +#define TM6010_REQ07_R53_VBI_DATA_TYPE_LINE23 0x53 +#define TM6010_REQ07_R54_VBI_DATA_TYPE_RLINES 0x54 +#define TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN 0x55 +#define TM6010_REQ07_R56_VBI_LOOP_FILTER_I_GAIN 0x56 +#define TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN 0x57 +#define TM6010_REQ07_R58_VBI_CAPTION_DTO1 0x58 +#define TM6010_REQ07_R59_VBI_CAPTION_DTO0 0x59 +#define TM6010_REQ07_R5A_VBI_TELETEXT_DTO1 0x5A +#define TM6010_REQ07_R5B_VBI_TELETEXT_DTO0 0x5B +#define TM6010_REQ07_R5C_VBI_WSS625_DTO1 0x5C +#define TM6010_REQ07_R5D_VBI_WSS625_DTO0 0x5D +#define TM6010_REQ07_R5E_VBI_CAPTION_FRAME_START 0x5E +#define TM6010_REQ07_R5F_VBI_WSS625_FRAME_START 0x5F +#define TM6010_REQ07_R60_TELETEXT_FRAME_START 0x60 +#define TM6010_REQ07_R61_VBI_CCDATA1 0x61 +#define TM6010_REQ07_R62_VBI_CCDATA2 0x62 +#define TM6010_REQ07_R63_VBI_WSS625_DATA1 0x63 +#define TM6010_REQ07_R64_VBI_WSS625_DATA2 0x64 +#define TM6010_REQ07_R65_VBI_DATA_STATUS 0x65 +#define TM6010_REQ07_R66_VBI_CAPTION_START 0x66 +#define TM6010_REQ07_R67_VBI_WSS625_START 0x67 +#define TM6010_REQ07_R68_VBI_TELETEXT_START 0x68 +#define TM6010_REQ07_R70_HSYNC_DTO_INC_STATUS3 0x70 +#define TM6010_REQ07_R71_HSYNC_DTO_INC_STATUS2 0x71 +#define TM6010_REQ07_R72_HSYNC_DTO_INC_STATUS1 0x72 +#define TM6010_REQ07_R73_HSYNC_DTO_INC_STATUS0 0x73 +#define TM6010_REQ07_R74_CHROMA_DTO_INC_STATUS3 0x74 +#define TM6010_REQ07_R75_CHROMA_DTO_INC_STATUS2 0x75 +#define TM6010_REQ07_R76_CHROMA_DTO_INC_STATUS1 0x76 +#define TM6010_REQ07_R77_CHROMA_DTO_INC_STATUS0 0x77 +#define TM6010_REQ07_R78_AGC_AGAIN_STATUS 0x78 +#define TM6010_REQ07_R79_AGC_DGAIN_STATUS 0x79 +#define TM6010_REQ07_R7A_CHROMA_MAG_STATUS 0x7A +#define TM6010_REQ07_R7B_CHROMA_GAIN_STATUS1 0x7B +#define TM6010_REQ07_R7C_CHROMA_GAIN_STATUS0 0x7C +#define TM6010_REQ07_R7D_CORDIC_FREQ_STATUS 0x7D +#define TM6010_REQ07_R7F_STATUS_NOISE 0x7F +#define TM6010_REQ07_R80_COMB_FILTER_TRESHOLD 0x80 +#define TM6010_REQ07_R82_COMB_FILTER_CONFIG 0x82 +#define TM6010_REQ07_R83_CHROMA_LOCK_CONFIG 0x83 +#define TM6010_REQ07_R84_NOISE_NTSC_C 0x84 +#define TM6010_REQ07_R85_NOISE_PAL_C 0x85 +#define TM6010_REQ07_R86_NOISE_PHASE_C 0x86 +#define TM6010_REQ07_R87_NOISE_PHASE_Y 0x87 +#define TM6010_REQ07_R8A_CHROMA_LOOPFILTER_STATE 0x8A +#define TM6010_REQ07_R8B_CHROMA_HRESAMPLER 0x8B +#define TM6010_REQ07_R8D_CPUMP_DELAY_ADJ 0x8D +#define TM6010_REQ07_R8E_CPUMP_ADJ 0x8E +#define TM6010_REQ07_R8F_CPUMP_DELAY 0x8F /* Define TM6000/TM6010 Miscellaneous registers */ -#define TM6000_ACTIVE_VIDEO_SOURCE 0xC0 -#define TM6000_TRESHOLD 0xC1 -#define TM6000_HSYNC_WIDTH 0xC2 -#define TM6000_HSTART1 0xC3 -#define TM6000_HSTART0 0xC4 -#define TM6000_HEND1 0xC5 -#define TM6000_HEND0 0xC6 -#define TM6000_VSTART1 0xC7 -#define TM6000_VSTART0 0xC8 -#define TM6000_VEND1 0xC9 -#define TM6000_VEND0 0xCA -#define TM6000_DELAY 0xCB -#define TM6000_ACTIVE_VIDEO_IF 0xCC -#define TM6000_USB_PERIPHERY_CONTROL 0xD0 -#define TM6000_ADDR_FOR_REQ1 0xD1 -#define TM6000_ADDR_FOR_REQ2 0xD2 -#define TM6000_ADDR_FOR_REQ3 0xD3 -#define TM6000_ADDR_FOR_REQ4 0xD4 -#define TM6000_POWERSAVE 0xD5 -#define TM6000_ENDP_REQ1_REQ2 0xD6 -#define TM6000_ENDP_REQ3_REQ4 0xD7 -#define TM6000_IR 0xD8 -#define TM6000_IR_BSIZE 0xD9 -#define TM6000_IR_WAKEUP_SEL 0xDA -#define TM6000_IR_WAKEUP_ADD 0xDB -#define TM6000_IR_LEADER1 0xDC -#define TM6000_IR_LEADER0 0xDD -#define TM6000_IR_PULSE_CNT1 0xDE -#define TM6000_IR_PULSE_CNT0 0xDF -#define TM6000_DVIDEO_SOURCE 0xE0 -#define TM6000_DVIDEO_SOURCE_IF 0xE1 -#define TM6000_OUT_SEL2 0xE2 -#define TM6000_OUT_SEL1 0xE3 -#define TM6000_OUT_SEL0 0xE4 -#define TM6000_REMOTE_WAKEUP 0xE5 -#define TM6000_PUB_GPIO 0xE7 -#define TM6000_TYPESEL_MOS_I2S 0xE8 -#define TM6000_TYPESEL_MOS_TS 0xE9 -#define TM6000_TYPESEL_MOS_CCIR 0xEA -#define TM6000_BIST_CRC_RESULT0 0xF0 -#define TM6000_BIST_CRC_RESULT1 0xF1 -#define TM6000_BIST_CRC_RESULT2 0xF2 -#define TM6000_BIST_CRC_RESULT3 0xF3 -#define TM6000_BIST_ERR_VST2 0xF4 -#define TM6000_BIST_ERR_VST1 0xF5 -#define TM6000_BIST_ERR_VST0 0xF6 -#define TM6000_BIST 0xF7 -#define TM6000_POWER_DOWN 0xFE -#define TM6000_SOFT_RESET 0xFF +#define TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE 0xC0 +#define TM6010_REQ07_RC1_TRESHOLD 0xC1 +#define TM6010_REQ07_RC2_HSYNC_WIDTH 0xC2 +#define TM6010_REQ07_RC3_HSTART1 0xC3 +#define TM6010_REQ07_RC4_HSTART0 0xC4 +#define TM6010_REQ07_RC5_HEND1 0xC5 +#define TM6010_REQ07_RC6_HEND0 0xC6 +#define TM6010_REQ07_RC7_VSTART1 0xC7 +#define TM6010_REQ07_RC8_VSTART0 0xC8 +#define TM6010_REQ07_RC9_VEND1 0xC9 +#define TM6010_REQ07_RCA_VEND0 0xCA +#define TM6010_REQ07_RCB_DELAY 0xCB +#define TM6010_REQ07_RCC_ACTIVE_VIDEO_IF 0xCC +#define TM6010_REQ07_RD0_USB_PERIPHERY_CONTROL 0xD0 +#define TM6010_REQ07_RD1_ADDR_FOR_REQ1 0xD1 +#define TM6010_REQ07_RD2_ADDR_FOR_REQ2 0xD2 +#define TM6010_REQ07_RD3_ADDR_FOR_REQ3 0xD3 +#define TM6010_REQ07_RD4_ADDR_FOR_REQ4 0xD4 +#define TM6010_REQ07_RD5_POWERSAVE 0xD5 +#define TM6010_REQ07_RD6_ENDP_REQ1_REQ2 0xD6 +#define TM6010_REQ07_RD7_ENDP_REQ3_REQ4 0xD7 +#define TM6010_REQ07_RD8_IR 0xD8 +#define TM6010_REQ07_RD8_IR_BSIZE 0xD9 +#define TM6010_REQ07_RD8_IR_WAKEUP_SEL 0xDA +#define TM6010_REQ07_RD8_IR_WAKEUP_ADD 0xDB +#define TM6010_REQ07_RD8_IR_LEADER1 0xDC +#define TM6010_REQ07_RD8_IR_LEADER0 0xDD +#define TM6010_REQ07_RD8_IR_PULSE_CNT1 0xDE +#define TM6010_REQ07_RD8_IR_PULSE_CNT0 0xDF +#define TM6010_REQ07_RE0_DVIDEO_SOURCE 0xE0 +#define TM6010_REQ07_RE0_DVIDEO_SOURCE_IF 0xE1 +#define TM6010_REQ07_RE2_OUT_SEL2 0xE2 +#define TM6010_REQ07_RE3_OUT_SEL1 0xE3 +#define TM6010_REQ07_RE4_OUT_SEL0 0xE4 +#define TM6010_REQ07_RE5_REMOTE_WAKEUP 0xE5 +#define TM6010_REQ07_RE7_PUB_GPIO 0xE7 +#define TM6010_REQ07_RE8_TYPESEL_MOS_I2S 0xE8 +#define TM6010_REQ07_RE9_TYPESEL_MOS_TS 0xE9 +#define TM6010_REQ07_REA_TYPESEL_MOS_CCIR 0xEA +#define TM6010_REQ07_RF0_BIST_CRC_RESULT0 0xF0 +#define TM6010_REQ07_RF1_BIST_CRC_RESULT1 0xF1 +#define TM6010_REQ07_RF2_BIST_CRC_RESULT2 0xF2 +#define TM6010_REQ07_RF3_BIST_CRC_RESULT3 0xF3 +#define TM6010_REQ07_RF4_BIST_ERR_VST2 0xF4 +#define TM6010_REQ07_RF5_BIST_ERR_VST1 0xF5 +#define TM6010_REQ07_RF6_BIST_ERR_VST0 0xF6 +#define TM6010_REQ07_RF7_BIST 0xF7 +#define TM6010_REQ07_RFE_POWER_DOWN 0xFE +#define TM6010_REQ07_RFF_SOFT_RESET 0xFF /* Define TM6000/TM6010 USB registers */ #define TM6000_U_MAIN_CTRL 0x00