From patchwork Wed Mar 29 16:43:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Scheller X-Patchwork-Id: 9651957 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D0251602C8 for ; Wed, 29 Mar 2017 16:43:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C0D0E2845F for ; Wed, 29 Mar 2017 16:43:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B43C628497; Wed, 29 Mar 2017 16:43:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 45B882845F for ; Wed, 29 Mar 2017 16:43:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932127AbdC2QnX (ORCPT ); Wed, 29 Mar 2017 12:43:23 -0400 Received: from mail-wr0-f195.google.com ([209.85.128.195]:33838 "EHLO mail-wr0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753167AbdC2QnW (ORCPT ); Wed, 29 Mar 2017 12:43:22 -0400 Received: by mail-wr0-f195.google.com with SMTP id w43so4565893wrb.1 for ; Wed, 29 Mar 2017 09:43:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=LrN3G7V7mnzq7ZWpuOOd0bVBLqcTB379brPFje9jdPk=; b=e9LD+k97M4c9eWMKFI5ttnNTZo9Ec98qE8Oj9eXUnzhXL0Spx6Je/zPN7Bi3X5QzKP PJSF52p7kxUgpbIb3wftDaCCiesMc8Y7SOT7psunE06XxdSpUVoWi9ne5xQyEog05+LB nb6LSEgs7fO+r9wU1bCOAmdJjBcS0Ibb0wUHOZs8NjhadDT9LtuBY7yjhLtrhpNQIsvz OcvSttPMqVoasPMsgLs4sG5ORI/Sh0yH2UTwVHffN69da7PZoZ4cnLLfQkB3UxN/DhoT 7NfzknC47901EsxJMI08fGdelJV8lfFP7OOwtWF5VDCi8n7KS/PXGnHWbBe1oktDmUmr wwgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=LrN3G7V7mnzq7ZWpuOOd0bVBLqcTB379brPFje9jdPk=; b=MR0gaHVKJoXPtfs3gmTI6/JnJJVCevwOrYkovcvoC4ssb3WmF3NfuF1DI4CnGC1xxC 0tNUzhbbE7gnVOuBaUcJ3y+cWtj6QxE3g1J17UMKyx+EAuuMZ5oRnvb9xfCEwShBX1ek XGJc/iKwPpCaBh7yz1JjW4C1tMJRyIrsWEZ+EY5gUcDimtWBFb7fEuwgcGXeBgy0N4Fk mFpD5l9D8eZVugFLKwfwKsVD9xnWDWtBg7zwpHnBXn5QM2FUTMyzqgs1qYizU+k9510a rlJMJxFWEK9uLh1k2eW4iMq0bksgGE3FJ6SdYiUtvATgzlGx7DaNG/T2FiO3x0lnzjdX 7r9A== X-Gm-Message-State: AFeK/H2+Dbu03yZqaJFlJkDMS4pbgm4iiToVRwujQcoSteBSLXm+8CP9/sd2JR2VdaNzFw== X-Received: by 10.223.153.142 with SMTP id y14mr1321578wrb.193.1490805800145; Wed, 29 Mar 2017 09:43:20 -0700 (PDT) Received: from dvbdev.wuest.de (ip-37-24-178-151.hsi14.unitymediagroup.de. [37.24.178.151]) by smtp.gmail.com with ESMTPSA id x127sm8835277wmf.31.2017.03.29.09.43.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 29 Mar 2017 09:43:19 -0700 (PDT) From: Daniel Scheller To: linux-media@vger.kernel.org, mchehab@kernel.org Cc: liplianin@netup.ru, rjkm@metzlerbros.de, crope@iki.fi Subject: [PATCH v3 05/13] [media] dvb-frontends/stv0367: make PLLSETUP a function, add 58MHz IC speed Date: Wed, 29 Mar 2017 18:43:05 +0200 Message-Id: <20170329164313.14636-6-d.scheller.oss@gmail.com> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170329164313.14636-1-d.scheller.oss@gmail.com> References: <20170329164313.14636-1-d.scheller.oss@gmail.com> Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Daniel Scheller This moves the PLL SETUP code from stv0367ter_init() into a dedicated function, and also make it possible to configure 58Mhz IC speed at 27MHz Xtal (used on STV0367-based DDB cards/modules in QAM mode). Signed-off-by: Daniel Scheller --- drivers/media/dvb-frontends/stv0367.c | 73 +++++++++++++++++++++++------------ drivers/media/dvb-frontends/stv0367.h | 3 ++ 2 files changed, 51 insertions(+), 25 deletions(-) diff --git a/drivers/media/dvb-frontends/stv0367.c b/drivers/media/dvb-frontends/stv0367.c index 5b52673..da10d9a 100644 --- a/drivers/media/dvb-frontends/stv0367.c +++ b/drivers/media/dvb-frontends/stv0367.c @@ -271,6 +271,53 @@ static void stv0367_write_table(struct stv0367_state *state, } } +static void stv0367_pll_setup(struct stv0367_state *state, + u32 icspeed, u32 xtal) +{ + /* note on regs: R367TER_* and R367CAB_* defines each point to + * 0xf0d8, so just use R367TER_ for both cases + */ + + switch (icspeed) { + case STV0367_ICSPEED_58000: + switch (xtal) { + default: + case 27000000: + dprintk("STV0367 SetCLKgen for 58MHz IC and 27Mhz crystal\n"); + /* PLLMDIV: 27, PLLNDIV: 232 */ + stv0367_writereg(state, R367TER_PLLMDIV, 0x1b); + stv0367_writereg(state, R367TER_PLLNDIV, 0xe8); + break; + } + break; + default: + case STV0367_ICSPEED_53125: + switch (xtal) { + /* set internal freq to 53.125MHz */ + case 16000000: + stv0367_writereg(state, R367TER_PLLMDIV, 0x2); + stv0367_writereg(state, R367TER_PLLNDIV, 0x1b); + break; + case 25000000: + stv0367_writereg(state, R367TER_PLLMDIV, 0xa); + stv0367_writereg(state, R367TER_PLLNDIV, 0x55); + break; + default: + case 27000000: + dprintk("FE_STV0367TER_SetCLKgen for 27Mhz\n"); + stv0367_writereg(state, R367TER_PLLMDIV, 0x1); + stv0367_writereg(state, R367TER_PLLNDIV, 0x8); + break; + case 30000000: + stv0367_writereg(state, R367TER_PLLMDIV, 0xc); + stv0367_writereg(state, R367TER_PLLNDIV, 0x55); + break; + } + } + + stv0367_writereg(state, R367TER_PLLSETUP, 0x18); +} + static int stv0367ter_gate_ctrl(struct dvb_frontend *fe, int enable) { struct stv0367_state *state = fe->demodulator_priv; @@ -918,31 +965,7 @@ static int stv0367ter_init(struct dvb_frontend *fe) stv0367_write_table(state, stv0367_deftabs[state->deftabs][STV0367_TAB_TER]); - switch (state->config->xtal) { - /*set internal freq to 53.125MHz */ - case 16000000: - stv0367_writereg(state, R367TER_PLLMDIV, 0x2); - stv0367_writereg(state, R367TER_PLLNDIV, 0x1b); - stv0367_writereg(state, R367TER_PLLSETUP, 0x18); - break; - case 25000000: - stv0367_writereg(state, R367TER_PLLMDIV, 0xa); - stv0367_writereg(state, R367TER_PLLNDIV, 0x55); - stv0367_writereg(state, R367TER_PLLSETUP, 0x18); - break; - default: - case 27000000: - dprintk("FE_STV0367TER_SetCLKgen for 27Mhz\n"); - stv0367_writereg(state, R367TER_PLLMDIV, 0x1); - stv0367_writereg(state, R367TER_PLLNDIV, 0x8); - stv0367_writereg(state, R367TER_PLLSETUP, 0x18); - break; - case 30000000: - stv0367_writereg(state, R367TER_PLLMDIV, 0xc); - stv0367_writereg(state, R367TER_PLLNDIV, 0x55); - stv0367_writereg(state, R367TER_PLLSETUP, 0x18); - break; - } + stv0367_pll_setup(state, STV0367_ICSPEED_53125, state->config->xtal); stv0367_writereg(state, R367TER_I2CRPT, 0xa0); stv0367_writereg(state, R367TER_ANACTRL, 0x00); diff --git a/drivers/media/dvb-frontends/stv0367.h b/drivers/media/dvb-frontends/stv0367.h index 26c38a0..aaa0236 100644 --- a/drivers/media/dvb-frontends/stv0367.h +++ b/drivers/media/dvb-frontends/stv0367.h @@ -25,6 +25,9 @@ #include #include "dvb_frontend.h" +#define STV0367_ICSPEED_53125 53125000 +#define STV0367_ICSPEED_58000 58000000 + struct stv0367_config { u8 demod_address; u32 xtal;