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[2/2] v4l: fwnode: The clock lane is the first lane in lane_polarities

Message ID 20170814103137.17882-3-sakari.ailus@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Sakari Ailus Aug. 14, 2017, 10:31 a.m. UTC 
The clock lane is the first lane in the lane_polarities array. Reflect this
consistently by putting the number of data lanes after the number of clock
lanes.

Fixes: 4ee236219f6d ("media: v4l2-fwnode: suppress a warning at OF parsing logic")
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
---
 drivers/media/v4l2-core/v4l2-fwnode.c | 2 +-
 include/media/v4l2-fwnode.h           | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)
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Patch

diff --git a/drivers/media/v4l2-core/v4l2-fwnode.c b/drivers/media/v4l2-core/v4l2-fwnode.c
index 29e41312f04a..c9147ec398b3 100644
--- a/drivers/media/v4l2-core/v4l2-fwnode.c
+++ b/drivers/media/v4l2-core/v4l2-fwnode.c
@@ -48,7 +48,7 @@  static int v4l2_fwnode_endpoint_parse_csi2_bus(struct fwnode_handle *fwnode,
 
 	rval = fwnode_property_read_u32_array(fwnode, "data-lanes", NULL, 0);
 	if (rval > 0) {
-		u32 array[MAX_DATA_LANES + 1];
+		u32 array[1 + MAX_DATA_LANES];
 
 		bus->num_data_lanes = min_t(int, MAX_DATA_LANES, rval);
 
diff --git a/include/media/v4l2-fwnode.h b/include/media/v4l2-fwnode.h
index b373c43f65e8..8da716a6a1b8 100644
--- a/include/media/v4l2-fwnode.h
+++ b/include/media/v4l2-fwnode.h
@@ -42,7 +42,7 @@  struct v4l2_fwnode_bus_mipi_csi2 {
 	unsigned char data_lanes[MAX_DATA_LANES];
 	unsigned char clock_lane;
 	unsigned short num_data_lanes;
-	bool lane_polarities[MAX_DATA_LANES + 1];
+	bool lane_polarities[1 + MAX_DATA_LANES];
 };
 
 /**