From patchwork Mon Dec 18 12:14:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacob Chen X-Patchwork-Id: 10119071 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A7F146019C for ; Mon, 18 Dec 2017 12:17:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 99E3D28FB3 for ; Mon, 18 Dec 2017 12:17:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8EAC828FBE; Mon, 18 Dec 2017 12:17:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 36ABC28FB3 for ; Mon, 18 Dec 2017 12:17:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758364AbdLRMRN (ORCPT ); Mon, 18 Dec 2017 07:17:13 -0500 Received: from mail-pf0-f193.google.com ([209.85.192.193]:41478 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933637AbdLRMPp (ORCPT ); Mon, 18 Dec 2017 07:15:45 -0500 Received: by mail-pf0-f193.google.com with SMTP id j28so9590870pfk.8; Mon, 18 Dec 2017 04:15:45 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=65/xvObyND7dQjfixIQjhECw06kVsOWtMfHGpcUPo+Y=; b=OFYkbhbL6G7LgFUOhvnliy6gSWqn2O9LiPb+tdEWakhD4E9j2l2ORwMqTkGW6+Hhbz mmuEUDJM4QXKnT9SqX5pV7aYLEqc6TaZqFcOV1WDDiqlXM7dHlLNdQTqt3lDWU5DTDLA crcNu7J9RrivK/+0bPcu4+w/ac8jAuaHN8mLJW5H3SLKlJAL2ab8kXTALseOaT6lfKU4 +K/ghL+pZQSXMMG8uqbvxxgO/s/7B3zpNvaaIiQ1a4e0Cpeny4wM3At5/HVIFPyiTwHr OO5cSTgAeSzPxeIEaINHmLee7GwC1exbZs1RiRRzjpvWAzn0huyKj16sBspLDoV+N7BG OEoQ== X-Gm-Message-State: AKGB3mLtGZcu6esbjNtLZyf6y3zGpAmBt8785Ma9OJ8VB5W0fUNvJJGY PZ0mwKndkoJQEhdJ2Le5VLI= X-Google-Smtp-Source: ACJfBotVlh4uVx1QKOonFEU5qE6h0StpNN5soneb6SPKF5JIJxgi07OzBwPrVcCJbBYIts7Fq/HmQw== X-Received: by 10.99.99.66 with SMTP id x63mr1901362pgb.342.1513599344776; Mon, 18 Dec 2017 04:15:44 -0800 (PST) Received: from localhost.localdomain ([103.29.142.67]) by smtp.gmail.com with ESMTPSA id s184sm23828993pfb.9.2017.12.18.04.15.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 18 Dec 2017 04:15:44 -0800 (PST) From: Jacob Chen To: linux-rockchip@lists.infradead.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, mchehab@kernel.org, linux-media@vger.kernel.org, sakari.ailus@linux.intel.com, hans.verkuil@cisco.com, tfiga@chromium.org, zhengsq@rock-chips.com, laurent.pinchart@ideasonboard.com, zyc@rock-chips.com, eddie.cai.linux@gmail.com, jeffy.chen@rock-chips.com, allon.huang@rock-chips.com, devicetree@vger.kernel.org, heiko@sntech.de, robh+dt@kernel.org, Joao.Pinto@synopsys.com, Luis.Oliveira@synopsys.com, Jose.Abreu@synopsys.com, Jacob Chen Subject: [PATCH v4 11/16] dt-bindings: Document the Rockchip MIPI RX D-PHY bindings Date: Mon, 18 Dec 2017 20:14:40 +0800 Message-Id: <20171218121445.6086-8-jacob-chen@iotwrt.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171218121445.6086-1-jacob-chen@iotwrt.com> References: <20171218121445.6086-1-jacob-chen@iotwrt.com> Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jacob Chen Add DT bindings documentation for Rockchip MIPI D-PHY RX Signed-off-by: Jacob Chen Reviewed-by: Rob Herring --- .../bindings/media/rockchip-mipi-dphy.txt | 88 ++++++++++++++++++++++ 1 file changed, 88 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt diff --git a/Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt b/Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt new file mode 100644 index 000000000000..0571d7f35867 --- /dev/null +++ b/Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt @@ -0,0 +1,88 @@ +Rockchip SoC MIPI RX D-PHY +------------------------------------------------------------- + +Required properties: +- compatible: value should be one of the following + "rockchip,rk3288-mipi-dphy" + "rockchip,rk3399-mipi-dphy" +- clocks : list of clock specifiers, corresponding to entries in + clock-names property; +- clock-names: required clock name. + +MIPI RX0 D-PHY use registers in "general register files", it +should be a child of the GRF. +MIPI TXRX D-PHY have its own registers, it must have a reg property. + +Optional properties: +- reg: offset and length of the register set for the device. + +port node +------------------- + +The device node should contain two 'port' child nodes, according to the bindings +defined in Documentation/devicetree/bindings/media/video-interfaces.txt. + +The first port show the sensors connected in this mipi-dphy. +- endpoint: + - remote-endpoint: Linked to a sensor with a MIPI CSI-2 video bus. + - data-lanes : (required) an array specifying active physical MIPI-CSI2 + data input lanes and their mapping to logical lanes; the + D-PHY can't reroute lanes, so the array's content should + be consecutive and only its length is meaningful. + +The port node must contain at least one endpoint. It could have multiple endpoints +linked to different sensors, but please note that they are not supposed to be +actived at the same time. + +The second port should be connected to isp node. +- endpoint: + - remote-endpoint: Linked to Rockchip ISP1, which is defined + in rockchip-isp1.txt. + +Device node example +------------------- + +grf: syscon@ff770000 { + compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd"; + +... + + mipi_dphy_rx0: mipi-dphy-rx0 { + compatible = "rockchip,rk3399-mipi-dphy"; + clocks = <&cru SCLK_MIPIDPHY_REF>, + <&cru SCLK_DPHY_RX0_CFG>, + <&cru PCLK_VIO_GRF>; + clock-names = "dphy-ref", "dphy-cfg", "grf"; + power-domains = <&power RK3399_PD_VIO>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_in_wcam: endpoint@0 { + reg = <0>; + remote-endpoint = <&wcam_out>; + data-lanes = <1 2>; + }; + mipi_in_ucam: endpoint@1 { + reg = <1>; + remote-endpoint = <&ucam_out>; + data-lanes = <1>; + }; + }; + + port@1 { + reg = <1>; + + dphy_rx0_out: endpoint { + remote-endpoint = <&isp0_mipi_in>; + }; + }; + }; + }; +};