From patchwork Thu May 17 12:50:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 10406747 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4F8A860155 for ; Thu, 17 May 2018 12:51:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3C5E42236A for ; Thu, 17 May 2018 12:51:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 30F6828A61; Thu, 17 May 2018 12:51:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 964B528A40 for ; Thu, 17 May 2018 12:51:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751798AbeEQMvM (ORCPT ); Thu, 17 May 2018 08:51:12 -0400 Received: from mail-wm0-f68.google.com ([74.125.82.68]:54999 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751914AbeEQMvH (ORCPT ); Thu, 17 May 2018 08:51:07 -0400 Received: by mail-wm0-f68.google.com with SMTP id f6-v6so8197511wmc.4 for ; Thu, 17 May 2018 05:51:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ngZzSOOLrcaUiCYJ1ZwJZh2bBuoGjZQI+E9KX2N2fJg=; b=gzj0mr4rikmCrxZuImkSyv+unls9xit4HsL8lQF/GywPgDwMXQGIu5lbZrx7sNgbMW wkVIbY3p5Jc8Hf6wwh9ulaOm0FqsnXQFtNvo4mJLwDusJJtuh8jWIZLZMWqTo0llV3sl zg0I/juwGS4r/v1QDWn+e8ahWT4z54H/g/vqc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ngZzSOOLrcaUiCYJ1ZwJZh2bBuoGjZQI+E9KX2N2fJg=; b=nWBmjiXskPFaBH44cHLMLpA4aNi8eRwSNzIUx36HtKRXapQC0oHh/nPyeO8SY138/n EXhNuNLW5jYPTRm60QvzJolmXtbw5qm+pcbWkG9CjoIEZ3baYbshn0q3wpAJtAcPtHLD uRHeocBGqsJY5P5+JL0cotzh1ie3iAVgHxh3cbUC3pOGsJsSpHTfJ8IqZl3V1rghazvt DOu4Yn396E6CG2DP1r1N/rNliYDfn6aC2qyVJ+E3KeFUmpBgkE4fwarstijuATkT8NoS 0OgjPnU3CQwTouFUcctm4U7Ob//MFLOrOv6oraNNgJ+NPrrMwtkNq8loeMKfUUBUxUkb GyFA== X-Gm-Message-State: ALKqPwcqbn2Jn7KiYlqwH4xviw2g9nXrvQrzqYLTBUKhHKS+nEzvjsW4 ChqwWqr12fL0eHFdRy/JdZU/Xg== X-Google-Smtp-Source: AB8JxZonDB7vavhyH9qjoMvI/ldRiTkRf/JhHkQFVZt5sfp0/kiuA14QGACTfnO8xU6QLV9ZzsS7/g== X-Received: by 2002:a1c:ee0d:: with SMTP id m13-v6mr1737401wmh.136.1526561466250; Thu, 17 May 2018 05:51:06 -0700 (PDT) Received: from localhost.localdomain ([2001:8a0:6606:9100:b159:5390:182d:7dce]) by smtp.gmail.com with ESMTPSA id 33-v6sm6077665wrs.5.2018.05.17.05.51.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 17 May 2018 05:51:05 -0700 (PDT) From: Rui Miguel Silva To: mchehab@kernel.org, sakari.ailus@linux.intel.com, Steve Longerbeam , Philipp Zabel , Rob Herring Cc: linux-media@vger.kernel.org, devel@driverdev.osuosl.org, Shawn Guo , Fabio Estevam , devicetree@vger.kernel.org, Greg Kroah-Hartman , Ryan Harkin , Rui Miguel Silva Subject: [PATCH v4 06/12] media: dt-bindings: add bindings for i.MX7 media driver Date: Thu, 17 May 2018 13:50:27 +0100 Message-Id: <20180517125033.18050-7-rui.silva@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180517125033.18050-1-rui.silva@linaro.org> References: <20180517125033.18050-1-rui.silva@linaro.org> Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add bindings documentation for i.MX7 media drivers. Signed-off-by: Rui Miguel Silva --- .../devicetree/bindings/media/imx7.txt | 145 ++++++++++++++++++ 1 file changed, 145 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/imx7.txt diff --git a/Documentation/devicetree/bindings/media/imx7.txt b/Documentation/devicetree/bindings/media/imx7.txt new file mode 100644 index 000000000000..161cff8e6442 --- /dev/null +++ b/Documentation/devicetree/bindings/media/imx7.txt @@ -0,0 +1,145 @@ +Freescale i.MX7 Media Video Device +================================== + +Video Media Controller node +--------------------------- + +This is the media controller node for video capture support. It is a +virtual device that lists the camera serial interface nodes that the +media device will control. + +Required properties: +- compatible : "fsl,imx7-capture-subsystem"; +- ports : Should contain a list of phandles pointing to camera + sensor interface port of CSI + +example: + +capture-subsystem { + compatible = "fsl,imx7-capture-subsystem"; + ports = <&csi>; +}; + + +mipi_csi2 node +-------------- + +This is the device node for the MIPI CSI-2 receiver core in i.MX7 SoC. It is +compatible with previous version of Samsung D-phy. + +Required properties: + +- compatible : "fsl,imx7-mipi-csi2"; +- reg : base address and length of the register set for the device; +- interrupts : should contain MIPI CSIS interrupt; +- clocks : list of clock specifiers, see + Documentation/devicetree/bindings/clock/clock-bindings.txt for details; +- clock-names : must contain "pclk", "wrap" and "phy" entries, matching + entries in the clock property; +- power-domains : a phandle to the power domain, see + Documentation/devicetree/bindings/power/power_domain.txt for details. +- reset-names : should include following entry "mrst"; +- resets : a list of phandle, should contain reset entry of + reset-names; +- phy-supply : from the generic phy bindings, a phandle to a regulator that + provides power to MIPI CSIS core; +- bus-width : maximum number of data lanes supported (SoC specific); + +Optional properties: + +- clock-frequency : The IP's main (system bus) clock frequency in Hz, default + value when this property is not specified is 166 MHz; + +port node +--------- + +- reg : (required) can take the values 0 or 1, where 0 is the + related sink port and port 1 should be the source one; + +endpoint node +------------- + +- data-lanes : (required) an array specifying active physical MIPI-CSI2 + data input lanes and their mapping to logical lanes; the + array's content is unused, only its length is meaningful; + +- fsl,csis-hs-settle : (optional) differential receiver (HS-RX) settle time; + +example: + + mipi_csi: mipi-csi@30750000 { + #address-cells = <1>; + #size-cells = <0>; + + compatible = "fsl,imx7-mipi-csi2"; + reg = <0x30750000 0x10000>; + interrupts = ; + clocks = <&clks IMX7D_IPG_ROOT_CLK>, + <&clks IMX7D_MIPI_CSI_ROOT_CLK>, + <&clks IMX7D_MIPI_DPHY_ROOT_CLK>; + clock-names = "pclk", "wrap", "phy"; + clock-names = "mipi", "phy"; + clock-frequency = <166000000>; + power-domains = <&pgc_mipi_phy>; + phy-supply = <®_1p0d>; + resets = <&src IMX7_RESET_MIPI_PHY_MRST>; + reset-names = "mrst"; + bus-width = <4>; + fsl,csis-hs-settle = <3>; + fsl,csis-clk-settle = <0>; + + port@0 { + reg = <0>; + + mipi_from_sensor: endpoint { + remote-endpoint = <&ov2680_to_mipi>; + data-lanes = <1>; + }; + }; + + port@1 { + reg = <1>; + + mipi_vc0_to_csi_mux: endpoint { + remote-endpoint = <&csi_mux_from_mipi_vc0>; + }; + }; + }; + + +csi node +-------- + +This is device node for the CMOS Sensor Interface (CSI) which enables the chip +to connect directly to external CMOS image sensors. + +Required properties: + +- compatible : "fsl,imx7-csi"; +- reg : base address and length of the register set for the device; +- interrupts : should contain CSI interrupt; +- clocks : list of clock specifiers, see + Documentation/devicetree/bindings/clock/clock-bindings.txt for details; +- clock-names : must contain "axi", "mclk" and "dcic" entries, matching + entries in the clock property; + +example: + + csi: csi@30710000 { + #address-cells = <1>; + #size-cells = <0>; + + compatible = "fsl,imx7-csi"; + reg = <0x30710000 0x10000>; + interrupts = ; + clocks = <&clks IMX7D_CLK_DUMMY>, + <&clks IMX7D_CSI_MCLK_ROOT_CLK>, + <&clks IMX7D_CLK_DUMMY>; + clock-names = "axi", "mclk", "dcic"; + + port { + csi_from_csi_mux: endpoint { + remote-endpoint = <&csi_mux_to_csi>; + }; + }; + };