Message ID | 20180710080114.31469-13-paul.kocialkowski@bootlin.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Tue, Jul 10, 2018 at 10:01:04AM +0200, Paul Kocialkowski wrote: > From: Maxime Ripard <maxime.ripard@bootlin.com> > > This adds support for the C1 SRAM region (to be used with the SRAM > controller driver) for the A20 platform. The region is shared > between the Video Engine and the CPU. > > Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Fixed the SRAM size and applied. Maxime
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 59abb623b249..38999d791cb5 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -276,6 +276,20 @@ status = "disabled"; }; }; + + sram_c: sram@1d00000 { + compatible = "mmio-sram"; + reg = <0x01d00000 0x80000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x01d00000 0x80000>; + + ve_sram: sram-section@0 { + compatible = "allwinner,sun7i-a20-sram-c1", + "allwinner,sun4i-a10-sram-c1"; + reg = <0x000000 0x80000>; + }; + }; }; nmi_intc: interrupt-controller@1c00030 {