From patchwork Tue Jul 10 08:01:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 10516307 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 875856020F for ; Tue, 10 Jul 2018 08:03:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7A68B28C0A for ; Tue, 10 Jul 2018 08:03:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6C9B228C61; Tue, 10 Jul 2018 08:03:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7153F28C0A for ; Tue, 10 Jul 2018 08:03:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933485AbeGJICu (ORCPT ); Tue, 10 Jul 2018 04:02:50 -0400 Received: from mail.bootlin.com ([62.4.15.54]:53379 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751332AbeGJICr (ORCPT ); Tue, 10 Jul 2018 04:02:47 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id DC00B20D0D; Tue, 10 Jul 2018 10:02:45 +0200 (CEST) Received: from localhost.localdomain (AAubervilliers-681-1-12-56.w90-88.abo.wanadoo.fr [90.88.133.56]) by mail.bootlin.com (Postfix) with ESMTPSA id 91458209B7; Tue, 10 Jul 2018 10:02:04 +0200 (CEST) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Mauro Carvalho Chehab , Rob Herring , Mark Rutland , Maxime Ripard , Chen-Yu Tsai , Paul Kocialkowski , Marco Franchi , Icenowy Zheng , Hans Verkuil , Keiichi Watanabe , Jonathan Corbet , Smitha T Murthy , Tom Saeger , Andrzej Hajda , "David S . Miller" , Greg Kroah-Hartman , Andrew Morton , Randy Dunlap , Arnd Bergmann , Geert Uytterhoeven , Laurent Pinchart , Jacob Chen , Neil Armstrong , Benoit Parrot , Todor Tomov , Alexandre Courbot , Sakari Ailus , Andy Shevchenko , Pawel Osciak , Ricardo Ribalda Delgado , Hans de Goede , Sami Tolvanen , =?UTF-8?q?Niklas=20S=C3=B6derlund?= , linux-sunxi@googlegroups.com, Thomas Petazzoni , Hugues Fruchet , Randy Li Subject: [PATCH v5 22/22] ARM: dts: sun8i-h3: Add Video Engine and reserved memory nodes Date: Tue, 10 Jul 2018 10:01:14 +0200 Message-Id: <20180710080114.31469-23-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180710080114.31469-1-paul.kocialkowski@bootlin.com> References: <20180710080114.31469-1-paul.kocialkowski@bootlin.com> Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds nodes for the Video Engine and the associated reserved memory for the H3. Up to 96 MiB of memory are dedicated to the CMA pool. Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/sun8i-h3.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index c93f6be40533..02ed77b311e5 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -110,6 +110,20 @@ ; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + cma_pool: cma@4a000000 { + compatible = "shared-dma-pool"; + size = <0x6000000>; + alloc-ranges = <0x4a000000 0x6000000>; + reusable; + linux,cma-default; + }; + }; + soc { system-control@1c00000 { compatible = "allwinner,sun8i-h3-system-control", @@ -134,6 +148,19 @@ }; }; + vpu: video-codec@01c0e000 { + compatible = "allwinner,sun8i-h3-video-engine"; + reg = <0x01c0e000 0x1000>; + + clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>, + <&ccu CLK_DRAM_VE>; + clock-names = "ahb", "mod", "ram"; + + resets = <&ccu RST_BUS_VE>; + interrupts = ; + allwinner,sram = <&ve_sram 1>; + }; + mali: gpu@1c40000 { compatible = "allwinner,sun8i-h3-mali", "arm,mali-400"; reg = <0x01c40000 0x10000>;