@@ -15,6 +15,7 @@
#include <linux/ioctl.h>
#include <linux/module.h>
#include <linux/of.h>
+#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
@@ -28,8 +29,13 @@
#define MODULE_NAME "sun6i-csi"
+struct sun6i_csi_variant {
+ unsigned long mod_rate;
+};
+
struct sun6i_csi_dev {
struct sun6i_csi csi;
+ const struct sun6i_csi_variant *variant;
struct device *dev;
struct regmap *regmap;
@@ -161,15 +167,20 @@ int sun6i_csi_set_power(struct sun6i_csi *csi, bool enable)
regmap_update_bits(regmap, CSI_EN_REG, CSI_EN_CSI_EN, 0);
clk_disable_unprepare(sdev->clk_ram);
+ if (sdev->variant->mod_rate)
+ clk_rate_exclusive_put(sdev->clk_mod);
clk_disable_unprepare(sdev->clk_mod);
reset_control_assert(sdev->rstc_bus);
return 0;
}
+ if (sdev->variant->mod_rate)
+ clk_set_rate_exclusive(sdev->clk_mod, sdev->variant->mod_rate);
+
ret = clk_prepare_enable(sdev->clk_mod);
if (ret) {
dev_err(sdev->dev, "Enable csi clk err %d\n", ret);
- return ret;
+ goto clk_mod_put;
}
ret = clk_prepare_enable(sdev->clk_ram);
@@ -192,6 +203,9 @@ int sun6i_csi_set_power(struct sun6i_csi *csi, bool enable)
clk_disable_unprepare(sdev->clk_ram);
clk_mod_disable:
clk_disable_unprepare(sdev->clk_mod);
+clk_mod_put:
+ if (sdev->variant->mod_rate)
+ clk_rate_exclusive_put(sdev->clk_mod);
return ret;
}
@@ -871,6 +885,7 @@ static int sun6i_csi_probe(struct platform_device *pdev)
sdev->dev = &pdev->dev;
/* The DMA bus has the memory mapped at 0 */
sdev->dev->dma_pfn_offset = PHYS_OFFSET >> PAGE_SHIFT;
+ sdev->variant = of_device_get_match_data(sdev->dev);
ret = sun6i_csi_resource_request(sdev, pdev);
if (ret)
@@ -891,10 +906,13 @@ static int sun6i_csi_remove(struct platform_device *pdev)
return 0;
}
+static const struct sun6i_csi_variant sun6i_a31_csi = {
+};
+
static const struct of_device_id sun6i_csi_of_match[] = {
- { .compatible = "allwinner,sun6i-a31-csi", },
- { .compatible = "allwinner,sun8i-h3-csi", },
- { .compatible = "allwinner,sun8i-v3s-csi", },
+ { .compatible = "allwinner,sun6i-a31-csi", .data = &sun6i_a31_csi, },
+ { .compatible = "allwinner,sun8i-h3-csi", .data = &sun6i_a31_csi, },
+ { .compatible = "allwinner,sun8i-v3s-csi", .data = &sun6i_a31_csi, },
{},
};
MODULE_DEVICE_TABLE(of, sun6i_csi_of_match);
Unfortunately default CSI_SCLK rate cannot work properly to drive the connected sensor interface, particularly on few Allwinner SoC's like A64. So, add mod_rate quirk via driver data so-that the respective SoC's which require to alter the default mod clock rate can assign the operating clock rate. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- .../platform/sunxi/sun6i-csi/sun6i_csi.c | 26 ++++++++++++++++--- 1 file changed, 22 insertions(+), 4 deletions(-)