Message ID | 20201102030821.3049-3-mirela.rabulea@oss.nxp.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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Mon, 2 Nov 2020 03:09:59 +0000 From: "Mirela Rabulea (OSS)" <mirela.rabulea@oss.nxp.com> To: mchehab@kernel.org, hverkuil-cisco@xs4all.nl, shawnguo@kernel.org, robh+dt@kernel.org Cc: paul.kocialkowski@bootlin.com, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com, s.hauer@pengutronix.de, aisheng.dong@nxp.com, daniel.baluta@nxp.com, robert.chiras@nxp.com, laurentiu.palcu@nxp.com, mark.rutland@arm.com, devicetree@vger.kernel.org, p.zabel@pengutronix.de, ezequiel@collabora.com, laurent.pinchart+renesas@ideasonboard.com, niklas.soderlund+renesas@ragnatech.se, dafna.hirschfeld@collabora.com, Mirela Rabulea <mirela.rabulea@nxp.com> Subject: [PATCH v4 02/11] firmware: imx: scu-pd: Add power domains for imx-jpeg Date: Mon, 2 Nov 2020 05:08:12 +0200 Message-Id: <20201102030821.3049-3-mirela.rabulea@oss.nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201102030821.3049-1-mirela.rabulea@oss.nxp.com> References: <20201102030821.3049-1-mirela.rabulea@oss.nxp.com> Content-Type: text/plain X-Originating-IP: [86.124.170.94] X-ClientProxiedBy: AM0PR06CA0128.eurprd06.prod.outlook.com (2603:10a6:208:ab::33) To AM5PR04MB3137.eurprd04.prod.outlook.com (2603:10a6:206:c::18) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from fsr-ub1664-134.ea.freescale.net (86.124.170.94) by AM0PR06CA0128.eurprd06.prod.outlook.com (2603:10a6:208:ab::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3499.19 via Frontend Transport; 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Add V4L2 driver for i.MX8 JPEG Encoder/Decoder
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diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c index 946eea292b52..a614d8dd868e 100644 --- a/drivers/firmware/imx/scu-pd.c +++ b/drivers/firmware/imx/scu-pd.c @@ -180,6 +180,12 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = { { "cm41-pid", IMX_SC_R_M4_1_PID0, 5, true, 0}, { "cm41-mu-a1", IMX_SC_R_M4_1_MU_1A, 1, false, 0}, { "cm41-lpuart", IMX_SC_R_M4_1_UART, 1, false, 0}, + + /* IMAGE SS */ + { "img-jpegdec-mp", IMX_SC_R_MJPEG_DEC_MP, 1, false, 0 }, + { "img-jpegdec-s0", IMX_SC_R_MJPEG_DEC_S0, 4, true, 0 }, + { "img-jpegenc-mp", IMX_SC_R_MJPEG_ENC_MP, 1, false, 0 }, + { "img-jpegenc-s0", IMX_SC_R_MJPEG_ENC_S0, 4, true, 0 }, }; static const struct imx_sc_pd_soc imx8qxp_scu_pd = {