| Message ID | 20201104234427.26477-3-digetx@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Introduce core voltage scaling for NVIDIA Tegra20/30 SoCs | expand |
On Thu, 05 Nov 2020 02:43:59 +0300, Dmitry Osipenko wrote: > Document new DVFS OPP table and voltage regulator properties of the > SDHCI controller. > > Signed-off-by: Dmitry Osipenko <digetx@gmail.com> > --- > .../devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt index 96c0b1440c9c..1beb0416ae5f 100644 --- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt +++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt @@ -31,6 +31,16 @@ Required properties: Optional properties: - power-gpios : Specify GPIOs for power control +- operating-points-v2: See ../bindings/opp/opp.txt for details. +- core-supply: Phandle of voltage regulator of the SoC "core" power domain. + +For each opp entry in 'operating-points-v2' table: +- opp-supported-hw: One bitfield indicating: + On Tegra20: SoC process ID mask + On Tegra30+: SoC speedo ID mask + + A bitwise AND is performed against the value and if any bit + matches, the OPP gets enabled. Example: @@ -45,6 +55,8 @@ sdhci@c8000200 { wp-gpios = <&gpio 57 0>; /* gpio PH1 */ power-gpios = <&gpio 155 0>; /* gpio PT3 */ bus-width = <8>; + operating-points-v2 = <&dvfs_opp_table>; + core-supply = <&vdd_core>; }; Optional properties for Tegra210, Tegra186 and Tegra194:
Document new DVFS OPP table and voltage regulator properties of the SDHCI controller. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- .../devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt | 12 ++++++++++++ 1 file changed, 12 insertions(+)