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[70/75] media: imx: imx7_mipi_csis: Fully initialize MIPI_CSIS_DPHYCTRL register

Message ID 20210105152852.5733-71-laurent.pinchart@ideasonboard.com (mailing list archive)
State New, archived
Headers show
Series media: imx: Miscellaneous fixes and cleanups for i.MX7 | expand

Commit Message

Laurent Pinchart Jan. 5, 2021, 3:28 p.m. UTC 
When setting the CSIS parameters, write the MIPI_CSIS_DPHYCTRL register
fully instead of modifying selected fields, as the register doesn't
contain any reserved fields that need to be preserved. This simplifies
initialization slightly, and ensures that the register value doesn't
depend on its previous state (before a warm reboot for instance).

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
 drivers/staging/media/imx/imx7-mipi-csis.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c
index 63424a81c800..14496c6cbc09 100644
--- a/drivers/staging/media/imx/imx7-mipi-csis.c
+++ b/drivers/staging/media/imx/imx7-mipi-csis.c
@@ -532,10 +532,8 @@  static void mipi_csis_set_params(struct csi_state *state)
 
 	__mipi_csis_set_format(state);
 
-	val = mipi_csis_read(state, MIPI_CSIS_DPHYCTRL);
-	val = (val & ~MIPI_CSIS_DPHYCTRL_HSSETTLE_MASK)
-	    | MIPI_CSIS_DPHYCTRL_HSSETTLE(state->hs_settle);
-	mipi_csis_write(state, MIPI_CSIS_DPHYCTRL, val);
+	mipi_csis_write(state, MIPI_CSIS_DPHYCTRL,
+			MIPI_CSIS_DPHYCTRL_HSSETTLE(state->hs_settle));
 
 	val = (0 << MIPI_CSIS_ISPSYNC_HSYNC_LINTV_OFFSET) |
 		(0 << MIPI_CSIS_ISPSYNC_VSYNC_SINTV_OFFSET) |