From patchwork Fri Jan 15 20:01:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 12023993 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87F67C433E0 for ; Fri, 15 Jan 2021 20:03:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4BD5823A56 for ; Fri, 15 Jan 2021 20:03:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388548AbhAOUCv (ORCPT ); Fri, 15 Jan 2021 15:02:51 -0500 Received: from relay5-d.mail.gandi.net ([217.70.183.197]:59217 "EHLO relay5-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728460AbhAOUCt (ORCPT ); Fri, 15 Jan 2021 15:02:49 -0500 X-Originating-IP: 93.29.109.196 Received: from localhost.localdomain (196.109.29.93.rev.sfr.net [93.29.109.196]) (Authenticated sender: paul.kocialkowski@bootlin.com) by relay5-d.mail.gandi.net (Postfix) with ESMTPSA id B95B51C000A; Fri, 15 Jan 2021 20:02:04 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, devel@driverdev.osuosl.org, linux-sunxi@googlegroups.com Cc: Yong Deng , Mauro Carvalho Chehab , Rob Herring , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec , Paul Kocialkowski , Jonathan Corbet , Kishon Vijay Abraham I , Vinod Koul , Helen Koike , Dafna Hirschfeld , Greg Kroah-Hartman , Philipp Zabel , Sakari Ailus , Hans Verkuil , Thomas Petazzoni , kevin.lhopital@hotmail.com, Ezequiel Garcia , =?utf-8?b?S8OpdmluIEwnaMO0?= =?utf-8?b?cGl0YWw=?= Subject: [PATCH v5 06/16] media: sun6i-csi: Only configure the interface data width for parallel Date: Fri, 15 Jan 2021 21:01:31 +0100 Message-Id: <20210115200141.1397785-7-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210115200141.1397785-1-paul.kocialkowski@bootlin.com> References: <20210115200141.1397785-1-paul.kocialkowski@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Bits related to the interface data width are only applicable to the parallel interface and are irrelevant when the CSI controller is taking input from the MIPI CSI-2 controller. In prevision of adding support for this case, set these bits conditionally so there is no ambiguity. The conditional block is moved around before the interlaced conditional block for nicer code symmetry (conditional blocks first) while at it. Co-developed-by: Kévin L'hôpital Signed-off-by: Kévin L'hôpital Signed-off-by: Paul Kocialkowski Acked-by: Maxime Ripard --- .../platform/sunxi/sun6i-csi/sun6i_csi.c | 42 +++++++++++-------- 1 file changed, 25 insertions(+), 17 deletions(-) diff --git a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c index 1a11a6174a17..d06028f42534 100644 --- a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c +++ b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c @@ -378,8 +378,13 @@ static void sun6i_csi_setup_bus(struct sun6i_csi_dev *sdev) unsigned char bus_width; u32 flags; u32 cfg; + bool input_parallel = false; bool input_interlaced = false; + if (endpoint->bus_type == V4L2_MBUS_PARALLEL || + endpoint->bus_type == V4L2_MBUS_BT656) + input_parallel = true; + if (csi->config.field == V4L2_FIELD_INTERLACED || csi->config.field == V4L2_FIELD_INTERLACED_TB || csi->config.field == V4L2_FIELD_INTERLACED_BT) @@ -395,6 +400,26 @@ static void sun6i_csi_setup_bus(struct sun6i_csi_dev *sdev) CSI_IF_CFG_HREF_POL_MASK | CSI_IF_CFG_FIELD_MASK | CSI_IF_CFG_SRC_TYPE_MASK); + if (input_parallel) { + switch (bus_width) { + case 8: + cfg |= CSI_IF_CFG_IF_DATA_WIDTH_8BIT; + break; + case 10: + cfg |= CSI_IF_CFG_IF_DATA_WIDTH_10BIT; + break; + case 12: + cfg |= CSI_IF_CFG_IF_DATA_WIDTH_12BIT; + break; + case 16: /* No need to configure DATA_WIDTH for 16bit */ + break; + default: + dev_warn(sdev->dev, "Unsupported bus width: %u\n", + bus_width); + break; + } + } + if (input_interlaced) cfg |= CSI_IF_CFG_SRC_TYPE_INTERLACED; else @@ -440,23 +465,6 @@ static void sun6i_csi_setup_bus(struct sun6i_csi_dev *sdev) break; } - switch (bus_width) { - case 8: - cfg |= CSI_IF_CFG_IF_DATA_WIDTH_8BIT; - break; - case 10: - cfg |= CSI_IF_CFG_IF_DATA_WIDTH_10BIT; - break; - case 12: - cfg |= CSI_IF_CFG_IF_DATA_WIDTH_12BIT; - break; - case 16: /* No need to configure DATA_WIDTH for 16bit */ - break; - default: - dev_warn(sdev->dev, "Unsupported bus width: %u\n", bus_width); - break; - } - regmap_write(sdev->regmap, CSI_IF_CFG_REG, cfg); }