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[91.14.161.181]) by smtp.gmail.com with ESMTPSA id l21sm6122049wmh.31.2021.09.17.05.35.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Sep 2021 05:35:30 -0700 (PDT) From: " =?utf-8?q?Christian_K=C3=B6nig?= " X-Google-Original-From: =?utf-8?q?Christian_K=C3=B6nig?= To: linaro-mm-sig@lists.linaro.org, dri-devel@lists.freedesktop.org, linux-media@vger.kernel.org, intel-gfx@lists.freedesktop.org Cc: daniel@ffwll.ch Subject: [PATCH 17/26] drm/i915: use new iterator in i915_gem_object_wait_priority v2 Date: Fri, 17 Sep 2021 14:35:04 +0200 Message-Id: <20210917123513.1106-18-christian.koenig@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210917123513.1106-1-christian.koenig@amd.com> References: <20210917123513.1106-1-christian.koenig@amd.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Simplifying the code a bit. v2: add missing rcu_read_lock()/unlock() Signed-off-by: Christian König --- drivers/gpu/drm/i915/gem/i915_gem_wait.c | 34 +++++++----------------- 1 file changed, 10 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_wait.c b/drivers/gpu/drm/i915/gem/i915_gem_wait.c index e416cf528635..de8084b6af42 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_wait.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_wait.c @@ -122,32 +122,18 @@ i915_gem_object_wait_priority(struct drm_i915_gem_object *obj, unsigned int flags, const struct i915_sched_attr *attr) { - struct dma_fence *excl; - - if (flags & I915_WAIT_ALL) { - struct dma_fence **shared; - unsigned int count, i; - int ret; - - ret = dma_resv_get_fences(obj->base.resv, &excl, &count, - &shared); - if (ret) - return ret; - - for (i = 0; i < count; i++) { - i915_gem_fence_wait_priority(shared[i], attr); - dma_fence_put(shared[i]); - } - - kfree(shared); - } else { - excl = dma_resv_get_excl_unlocked(obj->base.resv); - } + struct dma_resv_iter cursor; + struct dma_fence *fence; - if (excl) { - i915_gem_fence_wait_priority(excl, attr); - dma_fence_put(excl); + rcu_read_lock(); + dma_resv_iter_begin(&cursor, obj->base.resv, flags & I915_WAIT_ALL); + dma_resv_for_each_fence_unlocked(&cursor, fence) { + rcu_read_unlock(); + i915_gem_fence_wait_priority(fence, attr); + rcu_read_lock(); } + dma_resv_iter_end(&cursor); + rcu_read_unlock(); return 0; }