diff mbox series

[v1,02/03] : arm64: dts: rk356x.dtsi: Add support for Hantro G1 on RK356x

Message ID 20220213171349.3924782-2-piotr.oniszczuk@gmail.com (mailing list archive)
State New, archived
Headers show
Series [v1,01/03] : media: hantro: Add support for Hantro G1 on RK356x | expand

Commit Message

Piotr Oniszczuk Feb. 13, 2022, 5:13 p.m. UTC
From: Piotr Oniszczuk <piotr.oniszczuk@gmail.com>

    RK356x has Hantro G1 video decoder capable to decode MPEG2/H.264/VP9
    video formats.

    This patch enables RK356x video decoder in RK356x device-tree
    include.

    Tested on [1] with FFmpeg v4l2_request code taken from [2]
    with MPEG2, H.642 and VP8 samples with results [3].

    [1] https://github.com/warpme/minimyth2
    [2] https://github.com/LibreELEC/LibreELEC.tv/blob/master/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch
    [3] https://github.com/warpme/minimyth2/blob/master/video-test-summary.txt

    Signed-off-by: Piotr Oniszczuk <piotr.oniszczuk@gmail.com>
---
 arch/arm64/boot/dts/rockchip/rk356x.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

Comments

Ezequiel Garcia Feb. 14, 2022, 11:51 a.m. UTC | #1
Hi Piotr,

Thanks for your patch.

On Sun, Feb 13, 2022 at 06:13:50PM +0100, Piotr Oniszczuk wrote:
>     From: Piotr Oniszczuk <piotr.oniszczuk@gmail.com>
> 

Please change the commit title to "arm64: dts: rockchip: Add VPU support for RK3568/RK3566".
Also, note that the commit description got some extra indentation.

>     RK356x has Hantro G1 video decoder capable to decode MPEG2/H.264/VP9
>     video formats.
> 

s/VP9/VP8

>     This patch enables RK356x video decoder in RK356x device-tree
>     include.
> 
>     Tested on [1] with FFmpeg v4l2_request code taken from [2]
>     with MPEG2, H.642 and VP8 samples with results [3].
> 
>     [1] https://github.com/warpme/minimyth2
>     [2] https://github.com/LibreELEC/LibreELEC.tv/blob/master/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch
>     [3] https://github.com/warpme/minimyth2/blob/master/video-test-summary.txt
> 
>     Signed-off-by: Piotr Oniszczuk <piotr.oniszczuk@gmail.com>
> ---
>  arch/arm64/boot/dts/rockchip/rk356x.dtsi | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> index a68033a23975..ae5d80c5ba64 100644
> --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> @@ -390,6 +390,28 @@ power-domain@RK3568_PD_RKVENC {
>  		};
>  	};
>  
> +	vpu: video-codec@fdea0400 {
> +		compatible = "rockchip,rk3568-vpu";
> +		reg = <0x0 0xfdea0000 0x0 0x800>;
> +		interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-names = "vdpu";

Please remove the interrupt-names, given there is only one interrupt line.

> +		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
> +		clock-names = "aclk", "hclk";
> +		iommus = <&vdpu_mmu>;
> +		power-domains = <&power RK3568_PD_VPU>;
> +	};
> +
> +	vdpu_mmu: iommu@fdea0800 {
> +		compatible = "rockchip,rk3568-iommu";
> +		reg = <0x0 0xfdea0800 0x0 0x40>;
> +		interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-names = "vdpu_mmu";

Same here.

Thanks,
Ezequiel

> +		clock-names = "aclk", "iface";
> +		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
> +		power-domains = <&power RK3568_PD_VPU>;
> +		#iommu-cells = <0>;
> +	};
> +
>  	sdmmc2: mmc@fe000000 {
>  		compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
>  		reg = <0x0 0xfe000000 0x0 0x4000>;
> -- 
> 2.29.2
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index a68033a23975..ae5d80c5ba64 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -390,6 +390,28 @@  power-domain@RK3568_PD_RKVENC {
 		};
 	};
 
+	vpu: video-codec@fdea0400 {
+		compatible = "rockchip,rk3568-vpu";
+		reg = <0x0 0xfdea0000 0x0 0x800>;
+		interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vdpu";
+		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+		clock-names = "aclk", "hclk";
+		iommus = <&vdpu_mmu>;
+		power-domains = <&power RK3568_PD_VPU>;
+	};
+
+	vdpu_mmu: iommu@fdea0800 {
+		compatible = "rockchip,rk3568-iommu";
+		reg = <0x0 0xfdea0800 0x0 0x40>;
+		interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vdpu_mmu";
+		clock-names = "aclk", "iface";
+		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+		power-domains = <&power RK3568_PD_VPU>;
+		#iommu-cells = <0>;
+	};
+
 	sdmmc2: mmc@fe000000 {
 		compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xfe000000 0x0 0x4000>;