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[86.58.32.107]) by smtp.gmail.com with ESMTPSA id a1-20020a1709063e8100b006ce06ed8aa7sm3501887ejj.142.2022.02.27.06.50.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 27 Feb 2022 06:50:34 -0800 (PST) From: Jernej Skrabec To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de Cc: mchehab@kernel.org, nicolas@ndufresne.ca, hverkuil-cisco@xs4all.nl, gregkh@linuxfoundation.org, wens@csie.org, samuel@sholland.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, Jernej Skrabec Subject: [RFC PATCH 5/8] media: hantro: postproc: Fix legacy regs configuration Date: Sun, 27 Feb 2022 15:49:23 +0100 Message-Id: <20220227144926.3006585-6-jernej.skrabec@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220227144926.3006585-1-jernej.skrabec@gmail.com> References: <20220227144926.3006585-1-jernej.skrabec@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Some postproc legacy registers were set in VP9 code. Move them to postproc and fix their value. Signed-off-by: Jernej Skrabec Reviewed-by: Ezequiel Garcia --- drivers/staging/media/hantro/hantro_g2_vp9_dec.c | 8 -------- drivers/staging/media/hantro/hantro_postproc.c | 10 ++++++++++ 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c index 91c21b634fab..c9cb11fd95af 100644 --- a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c +++ b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c @@ -515,16 +515,8 @@ static void config_bit_depth(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) { if (ctx->dev->variant->legacy_regs) { - u8 pp_shift = 0; - hantro_reg_write(ctx->dev, &g2_bit_depth_y, dec_params->bit_depth); hantro_reg_write(ctx->dev, &g2_bit_depth_c, dec_params->bit_depth); - hantro_reg_write(ctx->dev, &g2_rs_out_bit_depth, dec_params->bit_depth); - - if (dec_params->bit_depth > 8) - pp_shift = 16 - dec_params->bit_depth; - - hantro_reg_write(ctx->dev, &g2_pp_pix_shift, pp_shift); hantro_reg_write(ctx->dev, &g2_pix_shift, 0); } else { hantro_reg_write(ctx->dev, &g2_bit_depth_y_minus8, dec_params->bit_depth - 8); diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c index 1a76628d5754..11ae663f11b7 100644 --- a/drivers/staging/media/hantro/hantro_postproc.c +++ b/drivers/staging/media/hantro/hantro_postproc.c @@ -113,6 +113,16 @@ static void hantro_postproc_g2_enable(struct hantro_ctx *ctx) hantro_write_addr(vpu, G2_RS_OUT_LUMA_ADDR, dst_dma); hantro_write_addr(vpu, G2_RS_OUT_CHROMA_ADDR, dst_dma + chroma_offset); + if (ctx->dev->variant->legacy_regs) { + int out_depth = hantro_get_formath_depth(ctx->dst_fmt.pixelformat); + u8 pp_shift = 0; + + if (out_depth > 8) + pp_shift = 16 - out_depth; + + hantro_reg_write(ctx->dev, &g2_rs_out_bit_depth, out_depth); + hantro_reg_write(ctx->dev, &g2_pp_pix_shift, pp_shift); + } hantro_reg_write(vpu, &g2_out_rs_e, 1); }