| Message ID | 20220525185853.695931-4-paul.kocialkowski@bootlin.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Allwinner A31/A83T MIPI CSI-2 and A31 ISP / Platform Support | expand |
On 5/25/22 1:58 PM, Paul Kocialkowski wrote: > The V3s uses the mbus interconnect to provide DRAM access for a > number of blocks. The SoC can only map 2 GiB of DRAM, which is > reflected in the dma-ranges property. > > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Samuel Holland <samuel@sholland.org>
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index 084323d5c61c..a966b6a9acf5 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi @@ -577,6 +577,21 @@ int_mii_phy: ethernet-phy@1 { }; }; + mbus: dram-controller@1c62000 { + compatible = "allwinner,sun8i-v3s-mbus"; + reg = <0x01c62000 0x1000>, + <0x01c63000 0x1000>; + reg-names = "mbus", "dram"; + clocks = <&ccu CLK_MBUS>, + <&ccu CLK_DRAM>, + <&ccu CLK_BUS_DRAM>; + clock-names = "mbus", "dram", "bus"; + #address-cells = <1>; + #size-cells = <1>; + dma-ranges = <0x00000000 0x40000000 0x80000000>; + #interconnect-cells = <1>; + }; + spi0: spi@1c68000 { compatible = "allwinner,sun8i-h3-spi"; reg = <0x01c68000 0x1000>;
The V3s uses the mbus interconnect to provide DRAM access for a number of blocks. The SoC can only map 2 GiB of DRAM, which is reflected in the dma-ranges property. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> --- arch/arm/boot/dts/sun8i-v3s.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+)