diff mbox series

[07/11] media: cedrus: Remove cedrus_codec enum

Message ID 20221024201515.34129-8-jernej.skrabec@gmail.com (mailing list archive)
State New, archived
Headers show
Series media: cedrus: Format handling improvements and 10-bit HEVC support | expand

Commit Message

Jernej Škrabec Oct. 24, 2022, 8:15 p.m. UTC 
Last user of cedrus_codec enum is cedrus_engine_enable() but this
argument is completely redundant. Same information can be obtained via
source pixel format. Let's remove this argument and enum.

No functional changes intended.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
---
 drivers/staging/media/sunxi/cedrus/cedrus.h       |  8 --------
 drivers/staging/media/sunxi/cedrus/cedrus_h264.c  |  2 +-
 drivers/staging/media/sunxi/cedrus/cedrus_h265.c  |  2 +-
 drivers/staging/media/sunxi/cedrus/cedrus_hw.c    | 12 ++++++------
 drivers/staging/media/sunxi/cedrus/cedrus_hw.h    |  2 +-
 drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c |  2 +-
 drivers/staging/media/sunxi/cedrus/cedrus_vp8.c   |  2 +-
 7 files changed, 11 insertions(+), 19 deletions(-)

Comments

Paul Kocialkowski Oct. 25, 2022, 3:03 p.m. UTC | #1 
Hi Jernej,

On Mon 24 Oct 22, 22:15, Jernej Skrabec wrote:
> Last user of cedrus_codec enum is cedrus_engine_enable() but this
> argument is completely redundant. Same information can be obtained via
> source pixel format. Let's remove this argument and enum.
> 
> No functional changes intended.

Looks good to me!

Acked-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>

See a suggestion below but out of the scope of this patch.

> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
> ---
>  drivers/staging/media/sunxi/cedrus/cedrus.h       |  8 --------
>  drivers/staging/media/sunxi/cedrus/cedrus_h264.c  |  2 +-
>  drivers/staging/media/sunxi/cedrus/cedrus_h265.c  |  2 +-
>  drivers/staging/media/sunxi/cedrus/cedrus_hw.c    | 12 ++++++------
>  drivers/staging/media/sunxi/cedrus/cedrus_hw.h    |  2 +-
>  drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c |  2 +-
>  drivers/staging/media/sunxi/cedrus/cedrus_vp8.c   |  2 +-
>  7 files changed, 11 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.h b/drivers/staging/media/sunxi/cedrus/cedrus.h
> index 0b082b1fae22..5904294f3108 100644
> --- a/drivers/staging/media/sunxi/cedrus/cedrus.h
> +++ b/drivers/staging/media/sunxi/cedrus/cedrus.h
> @@ -35,14 +35,6 @@
>  #define CEDRUS_CAPABILITY_VP8_DEC	BIT(4)
>  #define CEDRUS_CAPABILITY_H265_10_DEC	BIT(5)
>  
> -enum cedrus_codec {
> -	CEDRUS_CODEC_MPEG2,
> -	CEDRUS_CODEC_H264,
> -	CEDRUS_CODEC_H265,
> -	CEDRUS_CODEC_VP8,
> -	CEDRUS_CODEC_LAST,
> -};
> -
>  enum cedrus_irq_status {
>  	CEDRUS_IRQ_NONE,
>  	CEDRUS_IRQ_ERROR,
> diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c
> index c92dec21c1ac..dfb401df138a 100644
> --- a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c
> +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c
> @@ -518,7 +518,7 @@ static int cedrus_h264_setup(struct cedrus_ctx *ctx, struct cedrus_run *run)
>  	struct cedrus_dev *dev = ctx->dev;
>  	int ret;
>  
> -	cedrus_engine_enable(ctx, CEDRUS_CODEC_H264);
> +	cedrus_engine_enable(ctx);
>  
>  	cedrus_write(dev, VE_H264_SDROT_CTRL, 0);
>  	cedrus_write(dev, VE_H264_EXTRA_BUFFER1,
> diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
> index 7a438cd22c34..5d3da50ce46a 100644
> --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
> +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
> @@ -471,7 +471,7 @@ static int cedrus_h265_setup(struct cedrus_ctx *ctx, struct cedrus_run *run)
>  	}
>  
>  	/* Activate H265 engine. */
> -	cedrus_engine_enable(ctx, CEDRUS_CODEC_H265);
> +	cedrus_engine_enable(ctx);
>  
>  	/* Source offset and length in bits. */
>  
> diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c
> index c3387cd1e80f..fa86a658fdc6 100644
> --- a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c
> +++ b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c
> @@ -31,7 +31,7 @@
>  #include "cedrus_hw.h"
>  #include "cedrus_regs.h"
>  
> -int cedrus_engine_enable(struct cedrus_ctx *ctx, enum cedrus_codec codec)
> +int cedrus_engine_enable(struct cedrus_ctx *ctx)
>  {
>  	u32 reg = 0;
>  
> @@ -42,18 +42,18 @@ int cedrus_engine_enable(struct cedrus_ctx *ctx, enum cedrus_codec codec)
>  	reg |= VE_MODE_REC_WR_MODE_2MB;
>  	reg |= VE_MODE_DDR_MODE_BW_128;
>  
> -	switch (codec) {
> -	case CEDRUS_CODEC_MPEG2:
> +	switch (ctx->src_fmt.pixelformat) {
> +	case V4L2_PIX_FMT_MPEG2_SLICE:
>  		reg |= VE_MODE_DEC_MPEG;
>  		break;
>  
>  	/* H.264 and VP8 both use the same decoding mode bit. */
> -	case CEDRUS_CODEC_H264:
> -	case CEDRUS_CODEC_VP8:
> +	case V4L2_PIX_FMT_H264_SLICE:
> +	case V4L2_PIX_FMT_VP8_FRAME:
>  		reg |= VE_MODE_DEC_H264;

Could be nice to declare VE_MODE_DEC_VP8 with the same bit or to rename it
VE_MODE_DEC_H264_VP8. There's no particular reason why H264 should prevail
over VP8.

Cheers,

Paul

>  		break;
>  
> -	case CEDRUS_CODEC_H265:
> +	case V4L2_PIX_FMT_HEVC_SLICE:
>  		reg |= VE_MODE_DEC_H265;
>  		break;
>  
> diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_hw.h b/drivers/staging/media/sunxi/cedrus/cedrus_hw.h
> index 7c92f00e36da..6f1e701b1ea8 100644
> --- a/drivers/staging/media/sunxi/cedrus/cedrus_hw.h
> +++ b/drivers/staging/media/sunxi/cedrus/cedrus_hw.h
> @@ -16,7 +16,7 @@
>  #ifndef _CEDRUS_HW_H_
>  #define _CEDRUS_HW_H_
>  
> -int cedrus_engine_enable(struct cedrus_ctx *ctx, enum cedrus_codec codec);
> +int cedrus_engine_enable(struct cedrus_ctx *ctx);
>  void cedrus_engine_disable(struct cedrus_dev *dev);
>  
>  void cedrus_dst_format_set(struct cedrus_dev *dev,
> diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c b/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c
> index c1128d2cd555..10e98f08aafc 100644
> --- a/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c
> +++ b/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c
> @@ -66,7 +66,7 @@ static int cedrus_mpeg2_setup(struct cedrus_ctx *ctx, struct cedrus_run *run)
>  	quantisation = run->mpeg2.quantisation;
>  
>  	/* Activate MPEG engine. */
> -	cedrus_engine_enable(ctx, CEDRUS_CODEC_MPEG2);
> +	cedrus_engine_enable(ctx);
>  
>  	/* Set intra quantisation matrix. */
>  	matrix = quantisation->intra_quantiser_matrix;
> diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_vp8.c b/drivers/staging/media/sunxi/cedrus/cedrus_vp8.c
> index f7714baae37d..969677a3bbf9 100644
> --- a/drivers/staging/media/sunxi/cedrus/cedrus_vp8.c
> +++ b/drivers/staging/media/sunxi/cedrus/cedrus_vp8.c
> @@ -662,7 +662,7 @@ static int cedrus_vp8_setup(struct cedrus_ctx *ctx, struct cedrus_run *run)
>  	int header_size;
>  	u32 reg;
>  
> -	cedrus_engine_enable(ctx, CEDRUS_CODEC_VP8);
> +	cedrus_engine_enable(ctx);
>  
>  	cedrus_write(dev, VE_H264_CTRL, VE_H264_CTRL_VP8);
>  
> -- 
> 2.38.1
>
diff mbox series

Patch

diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.h b/drivers/staging/media/sunxi/cedrus/cedrus.h
index 0b082b1fae22..5904294f3108 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus.h
+++ b/drivers/staging/media/sunxi/cedrus/cedrus.h
@@ -35,14 +35,6 @@ 
 #define CEDRUS_CAPABILITY_VP8_DEC	BIT(4)
 #define CEDRUS_CAPABILITY_H265_10_DEC	BIT(5)
 
-enum cedrus_codec {
-	CEDRUS_CODEC_MPEG2,
-	CEDRUS_CODEC_H264,
-	CEDRUS_CODEC_H265,
-	CEDRUS_CODEC_VP8,
-	CEDRUS_CODEC_LAST,
-};
-
 enum cedrus_irq_status {
 	CEDRUS_IRQ_NONE,
 	CEDRUS_IRQ_ERROR,
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c
index c92dec21c1ac..dfb401df138a 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c
@@ -518,7 +518,7 @@  static int cedrus_h264_setup(struct cedrus_ctx *ctx, struct cedrus_run *run)
 	struct cedrus_dev *dev = ctx->dev;
 	int ret;
 
-	cedrus_engine_enable(ctx, CEDRUS_CODEC_H264);
+	cedrus_engine_enable(ctx);
 
 	cedrus_write(dev, VE_H264_SDROT_CTRL, 0);
 	cedrus_write(dev, VE_H264_EXTRA_BUFFER1,
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
index 7a438cd22c34..5d3da50ce46a 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
@@ -471,7 +471,7 @@  static int cedrus_h265_setup(struct cedrus_ctx *ctx, struct cedrus_run *run)
 	}
 
 	/* Activate H265 engine. */
-	cedrus_engine_enable(ctx, CEDRUS_CODEC_H265);
+	cedrus_engine_enable(ctx);
 
 	/* Source offset and length in bits. */
 
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c
index c3387cd1e80f..fa86a658fdc6 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c
@@ -31,7 +31,7 @@ 
 #include "cedrus_hw.h"
 #include "cedrus_regs.h"
 
-int cedrus_engine_enable(struct cedrus_ctx *ctx, enum cedrus_codec codec)
+int cedrus_engine_enable(struct cedrus_ctx *ctx)
 {
 	u32 reg = 0;
 
@@ -42,18 +42,18 @@  int cedrus_engine_enable(struct cedrus_ctx *ctx, enum cedrus_codec codec)
 	reg |= VE_MODE_REC_WR_MODE_2MB;
 	reg |= VE_MODE_DDR_MODE_BW_128;
 
-	switch (codec) {
-	case CEDRUS_CODEC_MPEG2:
+	switch (ctx->src_fmt.pixelformat) {
+	case V4L2_PIX_FMT_MPEG2_SLICE:
 		reg |= VE_MODE_DEC_MPEG;
 		break;
 
 	/* H.264 and VP8 both use the same decoding mode bit. */
-	case CEDRUS_CODEC_H264:
-	case CEDRUS_CODEC_VP8:
+	case V4L2_PIX_FMT_H264_SLICE:
+	case V4L2_PIX_FMT_VP8_FRAME:
 		reg |= VE_MODE_DEC_H264;
 		break;
 
-	case CEDRUS_CODEC_H265:
+	case V4L2_PIX_FMT_HEVC_SLICE:
 		reg |= VE_MODE_DEC_H265;
 		break;
 
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_hw.h b/drivers/staging/media/sunxi/cedrus/cedrus_hw.h
index 7c92f00e36da..6f1e701b1ea8 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus_hw.h
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_hw.h
@@ -16,7 +16,7 @@ 
 #ifndef _CEDRUS_HW_H_
 #define _CEDRUS_HW_H_
 
-int cedrus_engine_enable(struct cedrus_ctx *ctx, enum cedrus_codec codec);
+int cedrus_engine_enable(struct cedrus_ctx *ctx);
 void cedrus_engine_disable(struct cedrus_dev *dev);
 
 void cedrus_dst_format_set(struct cedrus_dev *dev,
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c b/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c
index c1128d2cd555..10e98f08aafc 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c
@@ -66,7 +66,7 @@  static int cedrus_mpeg2_setup(struct cedrus_ctx *ctx, struct cedrus_run *run)
 	quantisation = run->mpeg2.quantisation;
 
 	/* Activate MPEG engine. */
-	cedrus_engine_enable(ctx, CEDRUS_CODEC_MPEG2);
+	cedrus_engine_enable(ctx);
 
 	/* Set intra quantisation matrix. */
 	matrix = quantisation->intra_quantiser_matrix;
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_vp8.c b/drivers/staging/media/sunxi/cedrus/cedrus_vp8.c
index f7714baae37d..969677a3bbf9 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus_vp8.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_vp8.c
@@ -662,7 +662,7 @@  static int cedrus_vp8_setup(struct cedrus_ctx *ctx, struct cedrus_run *run)
 	int header_size;
 	u32 reg;
 
-	cedrus_engine_enable(ctx, CEDRUS_CODEC_VP8);
+	cedrus_engine_enable(ctx);
 
 	cedrus_write(dev, VE_H264_CTRL, VE_H264_CTRL_VP8);