From patchwork Fri Jan 13 06:40:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Moudy Ho X-Patchwork-Id: 13100158 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 43D4EC678D6 for ; Fri, 13 Jan 2023 06:56:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238274AbjAMG44 (ORCPT ); Fri, 13 Jan 2023 01:56:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56658 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231429AbjAMG4P (ORCPT ); Fri, 13 Jan 2023 01:56:15 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BFA0A75776; Thu, 12 Jan 2023 22:41:16 -0800 (PST) X-UUID: 42748cfa930d11ed945fc101203acc17-20230113 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=55cA/tcb2f18oiDb5jo91SDcgfLJkNOY6f62rcevdJo=; b=NwczyRgTjTYeLfUytyF7zTATksx2ikAq2lGOVfwx2YJirquDq96LECRfQqsKNmETcS6P8WwzDfkYUSCchPA1GB/8Lqml5dlweFYZdrC9hO8UHlYaE9pmcJw4i4CLHZkIw4TpkVkuTYzJHswDO9CJVJjezXr6dp13Dm0HwZ7q1w4=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.17,REQID:0747de87-c5c1-4cc9-a261-918049d71aec,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTI ON:release,TS:70 X-CID-INFO: VERSION:1.1.17,REQID:0747de87-c5c1-4cc9-a261-918049d71aec,IP:0,URL :0,TC:0,Content:-25,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTI ON:quarantine,TS:70 X-CID-META: VersionHash:543e81c,CLOUDID:a71d278c-8530-4eff-9f77-222cf6e2895b,B ulkID:230113144109C4Q8P2QI,BulkQuantity:0,Recheck:0,SF:38|28|17|19|48,TC:n il,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OS I:0,OSA:0 X-CID-APTURL: Status:success,Category:nil,Trust:0,Unknown:0,Malicious:0 X-CID-BVR: 0 X-UUID: 42748cfa930d11ed945fc101203acc17-20230113 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1468138751; Fri, 13 Jan 2023 14:41:07 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Fri, 13 Jan 2023 14:41:06 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Fri, 13 Jan 2023 14:41:06 +0800 From: Moudy Ho To: Mauro Carvalho Chehab , Matthias Brugger , Hans Verkuil CC: Chun-Kuang Hu , , , , , Moudy Ho Subject: [PATCH v5 06/12] media: platform: mtk-mdp3: chip config split about resolution limitations Date: Fri, 13 Jan 2023 14:40:58 +0800 Message-ID: <20230113064104.22402-7-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230113064104.22402-1-moudy.ho@mediatek.com> References: <20230113064104.22402-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Due to differences in hardware design, the supported max and min resolutions and scaling capabilities will vary, and should be moved and integrated into the chip configuration header file. Signed-off-by: Moudy Ho --- .../mediatek/mdp3/mt8183/mdp3-plat-mt8183.h | 19 +++++++++++++++++ .../platform/mediatek/mdp3/mtk-mdp3-core.c | 1 + .../platform/mediatek/mdp3/mtk-mdp3-core.h | 1 + .../platform/mediatek/mdp3/mtk-mdp3-m2m.c | 5 +++-- .../platform/mediatek/mdp3/mtk-mdp3-regs.c | 21 +------------------ 5 files changed, 25 insertions(+), 22 deletions(-) diff --git a/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h b/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h index 1be9cc55b9b5..c541176780aa 100644 --- a/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h +++ b/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h @@ -380,4 +380,23 @@ static const struct mdp_format mt8183_formats[] = { } }; +static const struct mdp_limit mt8183_mdp_def_limit = { + .out_limit = { + .wmin = 16, + .hmin = 16, + .wmax = 8176, + .hmax = 8176, + }, + .cap_limit = { + .wmin = 2, + .hmin = 2, + .wmax = 8176, + .hmax = 8176, + }, + .h_scale_up_max = 32, + .v_scale_up_max = 32, + .h_scale_down_max = 20, + .v_scale_down_max = 128, +}; + #endif /* __MDP3_PLAT_MT8183_H__ */ diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c index ce18cbf70e96..4b02c135b631 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c @@ -26,6 +26,7 @@ static const struct mtk_mdp_driver_data mt8183_mdp_driver_data = { .comp_data_len = ARRAY_SIZE(mt8183_mdp_comp_data), .format = mt8183_formats, .format_len = ARRAY_SIZE(mt8183_formats), + .def_limit = &mt8183_mdp_def_limit, }; static const struct of_device_id mdp_of_ids[] = { diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h index 982438a9ab02..52f87e59ba9e 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h @@ -59,6 +59,7 @@ struct mtk_mdp_driver_data { unsigned int comp_data_len; const struct mdp_format *format; unsigned int format_len; + const struct mdp_limit *def_limit; }; struct mdp_dev { diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-m2m.c b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-m2m.c index 7c14679ffd78..eba181fa50ad 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-m2m.c +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-m2m.c @@ -558,6 +558,7 @@ static int mdp_m2m_open(struct file *file) struct device *dev = &mdp->pdev->dev; int ret; struct v4l2_format default_format = {}; + const struct mdp_limit *limit = mdp->mdp_data->def_limit; ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); if (!ctx) @@ -601,8 +602,8 @@ static int mdp_m2m_open(struct file *file) /* Default format */ default_format.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; - default_format.fmt.pix_mp.width = 32; - default_format.fmt.pix_mp.height = 32; + default_format.fmt.pix_mp.width = limit->out_limit.wmin; + default_format.fmt.pix_mp.height = limit->out_limit.hmin; default_format.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_YUV420M; mdp_m2m_s_fmt_mplane(file, &ctx->fh, &default_format); default_format.type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c index 9e476d7c9570..39093180b98d 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c @@ -11,25 +11,6 @@ #include "mtk-mdp3-regs.h" #include "mtk-mdp3-m2m.h" -static const struct mdp_limit mdp_def_limit = { - .out_limit = { - .wmin = 16, - .hmin = 16, - .wmax = 8176, - .hmax = 8176, - }, - .cap_limit = { - .wmin = 2, - .hmin = 2, - .wmax = 8176, - .hmax = 8176, - }, - .h_scale_up_max = 32, - .v_scale_up_max = 32, - .h_scale_down_max = 20, - .v_scale_down_max = 128, -}; - static const struct mdp_format *mdp_find_fmt(const struct mtk_mdp_driver_data *mdp_data, u32 pixelformat, u32 type) { @@ -485,7 +466,7 @@ int mdp_frameparam_init(struct mdp_dev *mdp, struct mdp_frameparam *param) return -EINVAL; INIT_LIST_HEAD(¶m->list); - param->limit = &mdp_def_limit; + param->limit = mdp->mdp_data->def_limit; param->type = MDP_STREAM_TYPE_BITBLT; frame = ¶m->output;