diff mbox series

[v1,3/5] media: cadence: Add operation on reset

Message ID 20230512102637.50917-4-jack.zhu@starfivetech.com (mailing list archive)
State New, archived
Headers show
Series Add support for external dphy | expand

Commit Message

Jack Zhu May 12, 2023, 10:26 a.m. UTC 
Add operation on reset for Cadence MIPI-CSI2 RX Controller.

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Jack Zhu <jack.zhu@starfivetech.com>
---
 drivers/media/platform/cadence/cdns-csi2rx.c | 40 +++++++++++++++++---
 1 file changed, 35 insertions(+), 5 deletions(-)

Comments

Philipp Zabel May 15, 2023, 2:42 p.m. UTC | #1 
Hi Jack,

On Fri, May 12, 2023 at 06:26:35PM +0800, Jack Zhu wrote:
[...]
> @@ -299,6 +312,16 @@ static int csi2rx_get_resources(struct csi2rx_priv *csi2rx,
>  		return PTR_ERR(csi2rx->p_clk);
>  	}
>  
> +	csi2rx->sys_rst = devm_reset_control_get_optional_exclusive(&pdev->dev,
> +								    "sys_rst");

This doesn't match the bindings documented in patch 2.
Should this be "sys"?

> +	if (IS_ERR(csi2rx->sys_rst))
> +		return PTR_ERR(csi2rx->sys_rst);
> +
> +	csi2rx->p_rst = devm_reset_control_get_optional_exclusive(&pdev->dev,
> +								  "p_rst");

This doesn't match the bindings documented in patch 2.
Should this be "reg_bank"?

> +	if (IS_ERR(csi2rx->p_rst))
> +		return PTR_ERR(csi2rx->p_rst);
> +
>  	csi2rx->dphy = devm_phy_optional_get(&pdev->dev, "dphy");
>  	if (IS_ERR(csi2rx->dphy)) {
>  		dev_err(&pdev->dev, "Couldn't get external D-PHY\n");
> @@ -349,14 +372,21 @@ static int csi2rx_get_resources(struct csi2rx_priv *csi2rx,
>  	}
>  
>  	for (i = 0; i < csi2rx->max_streams; i++) {
> -		char clk_name[16];
> +		char name[16];
>  
> -		snprintf(clk_name, sizeof(clk_name), "pixel_if%u_clk", i);
> -		csi2rx->pixel_clk[i] = devm_clk_get(&pdev->dev, clk_name);
> +		snprintf(name, sizeof(name), "pixel_if%u_clk", i);
> +		csi2rx->pixel_clk[i] = devm_clk_get(&pdev->dev, name);
>  		if (IS_ERR(csi2rx->pixel_clk[i])) {
> -			dev_err(&pdev->dev, "Couldn't get clock %s\n", clk_name);
> +			dev_err(&pdev->dev, "Couldn't get clock %s\n", name);
>  			return PTR_ERR(csi2rx->pixel_clk[i]);
>  		}
> +
> +		snprintf(name, sizeof(name), "pixel_if%u_rst", i);

This doesn't match the bindings documented in patch 2.
Should this be "pixel_if%u"?

regards
Philipp
Jack Zhu May 16, 2023, 12:47 a.m. UTC | #2 
Hi Philipp,

Thank you for your review!

On 2023/5/15 22:42, Philipp Zabel wrote:
> Hi Jack,
> 
> On Fri, May 12, 2023 at 06:26:35PM +0800, Jack Zhu wrote:
> [...]
>> @@ -299,6 +312,16 @@ static int csi2rx_get_resources(struct csi2rx_priv *csi2rx,
>>  		return PTR_ERR(csi2rx->p_clk);
>>  	}
>>  
>> +	csi2rx->sys_rst = devm_reset_control_get_optional_exclusive(&pdev->dev,
>> +								    "sys_rst");
> 
> This doesn't match the bindings documented in patch 2.
> Should this be "sys"?

Yes, will fix it.

> 
>> +	if (IS_ERR(csi2rx->sys_rst))
>> +		return PTR_ERR(csi2rx->sys_rst);
>> +
>> +	csi2rx->p_rst = devm_reset_control_get_optional_exclusive(&pdev->dev,
>> +								  "p_rst");
> 
> This doesn't match the bindings documented in patch 2.
> Should this be "reg_bank"?
> 

Yes, will fix it.

>> +	if (IS_ERR(csi2rx->p_rst))
>> +		return PTR_ERR(csi2rx->p_rst);
>> +
>>  	csi2rx->dphy = devm_phy_optional_get(&pdev->dev, "dphy");
>>  	if (IS_ERR(csi2rx->dphy)) {
>>  		dev_err(&pdev->dev, "Couldn't get external D-PHY\n");
>> @@ -349,14 +372,21 @@ static int csi2rx_get_resources(struct csi2rx_priv *csi2rx,
>>  	}
>>  
>>  	for (i = 0; i < csi2rx->max_streams; i++) {
>> -		char clk_name[16];
>> +		char name[16];
>>  
>> -		snprintf(clk_name, sizeof(clk_name), "pixel_if%u_clk", i);
>> -		csi2rx->pixel_clk[i] = devm_clk_get(&pdev->dev, clk_name);
>> +		snprintf(name, sizeof(name), "pixel_if%u_clk", i);
>> +		csi2rx->pixel_clk[i] = devm_clk_get(&pdev->dev, name);
>>  		if (IS_ERR(csi2rx->pixel_clk[i])) {
>> -			dev_err(&pdev->dev, "Couldn't get clock %s\n", clk_name);
>> +			dev_err(&pdev->dev, "Couldn't get clock %s\n", name);
>>  			return PTR_ERR(csi2rx->pixel_clk[i]);
>>  		}
>> +
>> +		snprintf(name, sizeof(name), "pixel_if%u_rst", i);
> 
> This doesn't match the bindings documented in patch 2.
> Should this be "pixel_if%u"?
> 

Yes, will fix it.

regards
Jack

> regards
> Philipp
diff mbox series

Patch

diff --git a/drivers/media/platform/cadence/cdns-csi2rx.c b/drivers/media/platform/cadence/cdns-csi2rx.c
index 9755d1c8ceb9..bb78f54e944e 100644
--- a/drivers/media/platform/cadence/cdns-csi2rx.c
+++ b/drivers/media/platform/cadence/cdns-csi2rx.c
@@ -13,6 +13,7 @@ 
 #include <linux/of_graph.h>
 #include <linux/phy/phy.h>
 #include <linux/platform_device.h>
+#include <linux/reset.h>
 #include <linux/slab.h>
 
 #include <media/v4l2-ctrls.h>
@@ -68,6 +69,9 @@  struct csi2rx_priv {
 	struct clk			*sys_clk;
 	struct clk			*p_clk;
 	struct clk			*pixel_clk[CSI2RX_STREAMS_MAX];
+	struct reset_control		*sys_rst;
+	struct reset_control		*p_rst;
+	struct reset_control		*pixel_rst[CSI2RX_STREAMS_MAX];
 	struct phy			*dphy;
 
 	u8				lanes[CSI2RX_LANES_MAX];
@@ -112,6 +116,7 @@  static int csi2rx_start(struct csi2rx_priv *csi2rx)
 	if (ret)
 		return ret;
 
+	reset_control_deassert(csi2rx->p_rst);
 	csi2rx_reset(csi2rx);
 
 	reg = csi2rx->num_lanes << 8;
@@ -154,6 +159,8 @@  static int csi2rx_start(struct csi2rx_priv *csi2rx)
 		if (ret)
 			goto err_disable_pixclk;
 
+		reset_control_deassert(csi2rx->pixel_rst[i]);
+
 		writel(CSI2RX_STREAM_CFG_FIFO_MODE_LARGE_BUF,
 		       csi2rx->base + CSI2RX_STREAM_CFG_REG(i));
 
@@ -169,13 +176,16 @@  static int csi2rx_start(struct csi2rx_priv *csi2rx)
 	if (ret)
 		goto err_disable_pixclk;
 
+	reset_control_deassert(csi2rx->sys_rst);
 	clk_disable_unprepare(csi2rx->p_clk);
 
 	return 0;
 
 err_disable_pixclk:
-	for (; i > 0; i--)
+	for (; i > 0; i--) {
+		reset_control_assert(csi2rx->pixel_rst[i - 1]);
 		clk_disable_unprepare(csi2rx->pixel_clk[i - 1]);
+	}
 
 err_disable_pclk:
 	clk_disable_unprepare(csi2rx->p_clk);
@@ -188,14 +198,17 @@  static void csi2rx_stop(struct csi2rx_priv *csi2rx)
 	unsigned int i;
 
 	clk_prepare_enable(csi2rx->p_clk);
+	reset_control_assert(csi2rx->sys_rst);
 	clk_disable_unprepare(csi2rx->sys_clk);
 
 	for (i = 0; i < csi2rx->max_streams; i++) {
 		writel(0, csi2rx->base + CSI2RX_STREAM_CTRL_REG(i));
 
+		reset_control_assert(csi2rx->pixel_rst[i]);
 		clk_disable_unprepare(csi2rx->pixel_clk[i]);
 	}
 
+	reset_control_assert(csi2rx->p_rst);
 	clk_disable_unprepare(csi2rx->p_clk);
 
 	if (v4l2_subdev_call(csi2rx->source_subdev, video, s_stream, false))
@@ -299,6 +312,16 @@  static int csi2rx_get_resources(struct csi2rx_priv *csi2rx,
 		return PTR_ERR(csi2rx->p_clk);
 	}
 
+	csi2rx->sys_rst = devm_reset_control_get_optional_exclusive(&pdev->dev,
+								    "sys_rst");
+	if (IS_ERR(csi2rx->sys_rst))
+		return PTR_ERR(csi2rx->sys_rst);
+
+	csi2rx->p_rst = devm_reset_control_get_optional_exclusive(&pdev->dev,
+								  "p_rst");
+	if (IS_ERR(csi2rx->p_rst))
+		return PTR_ERR(csi2rx->p_rst);
+
 	csi2rx->dphy = devm_phy_optional_get(&pdev->dev, "dphy");
 	if (IS_ERR(csi2rx->dphy)) {
 		dev_err(&pdev->dev, "Couldn't get external D-PHY\n");
@@ -349,14 +372,21 @@  static int csi2rx_get_resources(struct csi2rx_priv *csi2rx,
 	}
 
 	for (i = 0; i < csi2rx->max_streams; i++) {
-		char clk_name[16];
+		char name[16];
 
-		snprintf(clk_name, sizeof(clk_name), "pixel_if%u_clk", i);
-		csi2rx->pixel_clk[i] = devm_clk_get(&pdev->dev, clk_name);
+		snprintf(name, sizeof(name), "pixel_if%u_clk", i);
+		csi2rx->pixel_clk[i] = devm_clk_get(&pdev->dev, name);
 		if (IS_ERR(csi2rx->pixel_clk[i])) {
-			dev_err(&pdev->dev, "Couldn't get clock %s\n", clk_name);
+			dev_err(&pdev->dev, "Couldn't get clock %s\n", name);
 			return PTR_ERR(csi2rx->pixel_clk[i]);
 		}
+
+		snprintf(name, sizeof(name), "pixel_if%u_rst", i);
+		csi2rx->pixel_rst[i] =
+			devm_reset_control_get_optional_exclusive(&pdev->dev,
+								  name);
+		if (IS_ERR(csi2rx->pixel_rst[i]))
+			return PTR_ERR(csi2rx->pixel_rst[i]);
 	}
 
 	return 0;