@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
drm_apu-y += apu_drv.o
+drm_apu-y += apu_gem.o
obj-$(CONFIG_DRM_APU) += drm_apu.o
@@ -20,6 +20,8 @@ static int ioctl_apu_state(struct drm_device *dev, void *data,
static const struct drm_ioctl_desc ioctls[] = {
DRM_IOCTL_DEF_DRV(APU_STATE, ioctl_apu_state,
DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(APU_GEM_NEW, ioctl_gem_new,
+ DRM_RENDER_ALLOW),
};
DEFINE_DRM_GEM_DMA_FOPS(apu_drm_ops);
new file mode 100644
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2020 BayLibre SAS
+
+#include <drm/drm_gem_dma_helper.h>
+
+#include <uapi/drm/apu_drm.h>
+
+#include "apu_internal.h"
+
+struct drm_gem_object *apu_gem_create_object(struct drm_device *dev,
+ size_t size)
+{
+ struct drm_gem_dma_object *dma_obj;
+
+ dma_obj = drm_gem_dma_create(dev, size);
+ if (!dma_obj)
+ return NULL;
+
+ return &dma_obj->base;
+}
+
+int ioctl_gem_new(struct drm_device *dev, void *data,
+ struct drm_file *file_priv)
+{
+ struct drm_apu_gem_new *args = data;
+ struct drm_gem_dma_object *dma_obj;
+ struct apu_gem_object *apu_obj;
+ struct drm_gem_object *gem_obj;
+ int ret;
+
+ dma_obj = drm_gem_dma_create(dev, args->size);
+ if (IS_ERR(dma_obj))
+ return PTR_ERR(dma_obj);
+
+ gem_obj = &dma_obj->base;
+ apu_obj = to_apu_bo(gem_obj);
+
+ /*
+ * Save the size of buffer expected by application instead of the
+ * aligned one.
+ */
+ apu_obj->size = args->size;
+ apu_obj->offset = 0;
+ mutex_init(&apu_obj->mutex);
+
+ ret = drm_gem_handle_create(file_priv, gem_obj, &args->handle);
+ drm_gem_object_put(gem_obj);
+ if (ret) {
+ drm_gem_dma_object_free(gem_obj);
+ return ret;
+ }
+ args->offset = drm_vma_node_offset_addr(&gem_obj->vma_node);
+
+ return 0;
+}
@@ -3,6 +3,14 @@
#define __APU_INTERNAL_H__
#include <drm/drm_drv.h>
+#include <drm/drm_gem_dma_helper.h>
+
+struct apu_gem_object {
+ struct drm_gem_dma_object base;
+ struct mutex mutex;
+ size_t size;
+ u32 offset;
+};
struct apu_core {
int device_id;
@@ -54,6 +62,17 @@ struct apu_core_ops {
int (*is_ready)(struct apu_core *core);
};
+static inline struct apu_gem_object *to_apu_bo(struct drm_gem_object *obj)
+{
+ return container_of(to_drm_gem_dma_obj(obj), struct apu_gem_object,
+ base);
+}
+
+static inline void *apu_drm_priv(struct apu_core *apu_core)
+{
+ return apu_core->dev_priv;
+}
+
struct apu_drm *apu_dev_alloc(struct device *dev);
int apu_dev_register(struct apu_drm *apu);
void apu_dev_unregister(struct apu_drm *apu);
@@ -65,4 +84,15 @@ int apu_core_register(struct device *dev, struct apu_core *core, void *priv);
void apu_core_remove(struct apu_core *core);
struct apu_core *apu_find_core_by_priv(void *priv);
+struct apu_gem_object *to_apu_bo(struct drm_gem_object *obj);
+struct drm_gem_object *apu_gem_create_object(struct drm_device *dev,
+ size_t size);
+
+int ioctl_gem_new(struct drm_device *dev, void *data,
+ struct drm_file *file_priv);
+int ioctl_gem_user_new(struct drm_device *dev, void *data,
+ struct drm_file *file_priv);
+struct dma_buf *apu_gem_prime_export(struct drm_gem_object *gem,
+ int flags);
+
#endif /* __APU_INTERNAL_H__ */
@@ -9,6 +9,18 @@
extern "C" {
#endif
+/*
+ * Please note that modifications to all structs defined here are
+ * subject to backwards-compatibility constraints.
+ */
+
+struct drm_apu_gem_new {
+ __u32 size; /* in */
+ __u32 flags; /* in */
+ __u32 handle; /* out */
+ __u64 offset; /* out */
+};
+
#define APU_ONLINE BIT(0)
struct drm_apu_state {
@@ -17,9 +29,11 @@ struct drm_apu_state {
};
#define DRM_APU_STATE 0x00
-#define DRM_APU_NUM_IOCTLS 0x01
+#define DRM_APU_GEM_NEW 0x01
+#define DRM_APU_NUM_IOCTLS 0x02
#define DRM_IOCTL_APU_STATE DRM_IOWR(DRM_COMMAND_BASE + DRM_APU_STATE, struct drm_apu_state)
+#define DRM_IOCTL_APU_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_APU_GEM_NEW, struct drm_apu_gem_new)
#if defined(__cplusplus)
}