diff mbox series

dt-bindings: media: amphion,vpu: correct node name

Message ID 20230725102545.184916-1-peng.fan@oss.nxp.com (mailing list archive)
State New, archived
Headers show
Series dt-bindings: media: amphion,vpu: correct node name | expand

Commit Message

Peng Fan (OSS) July 25, 2023, 10:25 a.m. UTC
From: Peng Fan <peng.fan@nxp.com>

The node name should use hyphen(-), not underscore(_).

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 Documentation/devicetree/bindings/media/amphion,vpu.yaml | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Conor Dooley July 25, 2023, 6:40 p.m. UTC | #1
On Tue, Jul 25, 2023 at 06:25:45PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> The node name should use hyphen(-), not underscore(_).
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>

Acked-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.

> ---
>  Documentation/devicetree/bindings/media/amphion,vpu.yaml | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/media/amphion,vpu.yaml b/Documentation/devicetree/bindings/media/amphion,vpu.yaml
> index a9d80eaeeeb6..c0d83d755239 100644
> --- a/Documentation/devicetree/bindings/media/amphion,vpu.yaml
> +++ b/Documentation/devicetree/bindings/media/amphion,vpu.yaml
> @@ -47,7 +47,7 @@ patternProperties:
>      $ref: ../mailbox/fsl,mu.yaml#
>  
>  
> -  "^vpu_core@[0-9a-f]+$":
> +  "^vpu-core@[0-9a-f]+$":
>      description:
>        Each core correspond a decoder or encoder, need to configure them
>        separately. NXP i.MX8QM SoC has one decoder and two encoder, i.MX8QXP SoC
> @@ -143,7 +143,7 @@ examples:
>          power-domains = <&pd IMX_SC_R_VPU_MU_2>;
>        };
>  
> -      vpu_core0: vpu_core@2d080000 {
> +      vpu_core0: vpu-core@2d080000 {
>          compatible = "nxp,imx8q-vpu-decoder";
>          reg = <0x2d080000 0x10000>;
>          power-domains = <&pd IMX_SC_R_VPU_DEC_0>;
> @@ -154,7 +154,7 @@ examples:
>          memory-region = <&decoder_boot>, <&decoder_rpc>;
>        };
>  
> -      vpu_core1: vpu_core@2d090000 {
> +      vpu_core1: vpu-core@2d090000 {
>          compatible = "nxp,imx8q-vpu-encoder";
>          reg = <0x2d090000 0x10000>;
>          power-domains = <&pd IMX_SC_R_VPU_ENC_0>;
> @@ -165,7 +165,7 @@ examples:
>          memory-region = <&encoder1_boot>, <&encoder1_rpc>;
>        };
>  
> -      vpu_core2: vpu_core@2d0a0000 {
> +      vpu_core2: vpu-core@2d0a0000 {
>          reg = <0x2d0a0000 0x10000>;
>          compatible = "nxp,imx8q-vpu-encoder";
>          power-domains = <&pd IMX_SC_R_VPU_ENC_1>;
> -- 
> 2.37.1
>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/media/amphion,vpu.yaml b/Documentation/devicetree/bindings/media/amphion,vpu.yaml
index a9d80eaeeeb6..c0d83d755239 100644
--- a/Documentation/devicetree/bindings/media/amphion,vpu.yaml
+++ b/Documentation/devicetree/bindings/media/amphion,vpu.yaml
@@ -47,7 +47,7 @@  patternProperties:
     $ref: ../mailbox/fsl,mu.yaml#
 
 
-  "^vpu_core@[0-9a-f]+$":
+  "^vpu-core@[0-9a-f]+$":
     description:
       Each core correspond a decoder or encoder, need to configure them
       separately. NXP i.MX8QM SoC has one decoder and two encoder, i.MX8QXP SoC
@@ -143,7 +143,7 @@  examples:
         power-domains = <&pd IMX_SC_R_VPU_MU_2>;
       };
 
-      vpu_core0: vpu_core@2d080000 {
+      vpu_core0: vpu-core@2d080000 {
         compatible = "nxp,imx8q-vpu-decoder";
         reg = <0x2d080000 0x10000>;
         power-domains = <&pd IMX_SC_R_VPU_DEC_0>;
@@ -154,7 +154,7 @@  examples:
         memory-region = <&decoder_boot>, <&decoder_rpc>;
       };
 
-      vpu_core1: vpu_core@2d090000 {
+      vpu_core1: vpu-core@2d090000 {
         compatible = "nxp,imx8q-vpu-encoder";
         reg = <0x2d090000 0x10000>;
         power-domains = <&pd IMX_SC_R_VPU_ENC_0>;
@@ -165,7 +165,7 @@  examples:
         memory-region = <&encoder1_boot>, <&encoder1_rpc>;
       };
 
-      vpu_core2: vpu_core@2d0a0000 {
+      vpu_core2: vpu-core@2d0a0000 {
         reg = <0x2d0a0000 0x10000>;
         compatible = "nxp,imx8q-vpu-encoder";
         power-domains = <&pd IMX_SC_R_VPU_ENC_1>;