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Thu, 21 Sep 2023 06:36:47 +0000 From: Ming Qian To: mirela.rabulea@oss.nxp.com, robh+dt@kernel.org, shawnguo@kernel.org Cc: mchehab@kernel.org, hverkuil-cisco@xs4all.nl, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, xiahong.bao@nxp.com, eagle.zhou@nxp.com, tao.jiang_2@nxp.com, linux-imx@nxp.com, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 1/2] arm64: dts: imx8-ss-img: Assign slot for imx jpeg encoder/decoder Date: Thu, 21 Sep 2023 14:36:19 +0800 Message-Id: <20230921063620.22962-1-ming.qian@nxp.com> X-Mailer: git-send-email 2.38.1 X-ClientProxiedBy: SI2PR01CA0027.apcprd01.prod.exchangelabs.com (2603:1096:4:192::7) To AM6PR04MB6341.eurprd04.prod.outlook.com (2603:10a6:20b:d8::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB6341:EE_|AM9PR04MB8414:EE_ X-MS-Office365-Filtering-Correlation-Id: ecfa275b-f6f9-43a6-e321-08dbba6d2113 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Ming Qian --- .../arm64/boot/dts/freescale/imx8-ss-img.dtsi | 22 +++++-------------- 1 file changed, 6 insertions(+), 16 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi index a90654155a88..176dcce24b64 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi @@ -18,10 +18,7 @@ img_ipg_clk: clock-img-ipg { jpegdec: jpegdec@58400000 { reg = <0x58400000 0x00050000>; - interrupts = , - , - , - ; + interrupts = ; clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>, <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>; clock-names = "per", "ipg"; @@ -29,18 +26,13 @@ jpegdec: jpegdec@58400000 { <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>; assigned-clock-rates = <200000000>, <200000000>; power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>, - <&pd IMX_SC_R_MJPEG_DEC_S0>, - <&pd IMX_SC_R_MJPEG_DEC_S1>, - <&pd IMX_SC_R_MJPEG_DEC_S2>, - <&pd IMX_SC_R_MJPEG_DEC_S3>; + <&pd IMX_SC_R_MJPEG_DEC_S0>; + slot = <0>; }; jpegenc: jpegenc@58450000 { reg = <0x58450000 0x00050000>; - interrupts = , - , - , - ; + interrupts = ; clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>, <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>; clock-names = "per", "ipg"; @@ -48,10 +40,8 @@ jpegenc: jpegenc@58450000 { <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>; assigned-clock-rates = <200000000>, <200000000>; power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>, - <&pd IMX_SC_R_MJPEG_ENC_S0>, - <&pd IMX_SC_R_MJPEG_ENC_S1>, - <&pd IMX_SC_R_MJPEG_ENC_S2>, - <&pd IMX_SC_R_MJPEG_ENC_S3>; + <&pd IMX_SC_R_MJPEG_ENC_S0>; + slot = <0>; }; img_jpeg_dec_lpcg: clock-controller@585d0000 {