From patchwork Thu Oct 5 13:37:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hugues FRUCHET X-Patchwork-Id: 13410224 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 000C0E92737 for ; Thu, 5 Oct 2023 15:58:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238071AbjJEP6N (ORCPT ); Thu, 5 Oct 2023 11:58:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59058 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235312AbjJEP5D (ORCPT ); Thu, 5 Oct 2023 11:57:03 -0400 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CDF7E11AD5 for ; Thu, 5 Oct 2023 06:58:36 -0700 (PDT) Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 395AZGOe025796; Thu, 5 Oct 2023 15:37:35 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= selector1; bh=bgESotg1ucUNSxBe+XGbEGaW9PYWluU0WM6A0IsNEdg=; b=uq MnlkmQTce8tPsaEn1KwfINY1DSTItlcAoQi/PYzP5ozT0InASOzkSiTftTTutRgF dwrTs/7mIb/a77WSzthL6clcTMDlEIOJGrkYK/7E0GR82+7zfytYeLvUuFIZP6Me uB/ZELnsN0xT5Yl9XcgUSeoWvzQTOplWorqD99m3wkB8I/8KJJr5MiufoJRiE0hi CjX1fSOeflyWGq7TfBGorvIPuRNeeH94jNyL9R2+X0XwnUilMwQL+TyJ0Ixn6RFr 1NYxxjQtcO3sc7yh9FICvdip4IGLZ+4Czv9nHjBEG9BDXWTA4mjVyjCgGRr73nRV Z7+t9rMq2BJTMTGatONQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3thuh40rg6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 05 Oct 2023 15:37:35 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 922D610005D; Thu, 5 Oct 2023 15:37:34 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 88377260280; Thu, 5 Oct 2023 15:37:34 +0200 (CEST) Received: from localhost (10.201.20.120) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Thu, 5 Oct 2023 15:37:34 +0200 From: Hugues Fruchet To: Ezequiel Garcia , Philipp Zabel , Andrzej Pietrasiewicz , Nicolas Dufresne , Sakari Ailus , Benjamin Gaignard , Laurent Pinchart , Daniel Almeida , Benjamin Mugnier , Heiko Stuebner , Mauro Carvalho Chehab , Hans Verkuil , , , CC: Hugues Fruchet , Marco Felsch , Adam Ford Subject: [RFC v2 4/6] media: hantro: add VP8 encode support for STM32MP25 VENC Date: Thu, 5 Oct 2023 15:37:08 +0200 Message-ID: <20231005133710.3589080-5-hugues.fruchet@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231005133710.3589080-1-hugues.fruchet@foss.st.com> References: <20231005133710.3589080-1-hugues.fruchet@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.20.120] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-05_08,2023-10-05_01,2023-05-22_02 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Add VP8 stateless support for STM32MP25 VENC video hardware encoder. Signed-off-by: Hugues Fruchet --- .../platform/verisilicon/stm32mp25_venc_hw.c | 22 ++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/verisilicon/stm32mp25_venc_hw.c b/drivers/media/platform/verisilicon/stm32mp25_venc_hw.c index 0aac33afcadc..2176eccd1f79 100644 --- a/drivers/media/platform/verisilicon/stm32mp25_venc_hw.c +++ b/drivers/media/platform/verisilicon/stm32mp25_venc_hw.c @@ -87,6 +87,19 @@ static const struct hantro_fmt stm32mp25_venc_fmts[] = { .step_height = MB_DIM, }, }, + { + .fourcc = V4L2_PIX_FMT_VP8_FRAME, + .codec_mode = HANTRO_MODE_VP8_ENC, + .max_depth = 2, + .frmsize = { + .min_width = 96, + .max_width = 4080, + .step_width = MB_DIM, + .min_height = 96, + .max_height = 4080, + .step_height = MB_DIM, + }, + }, }; static irqreturn_t stm32mp25_venc_irq(int irq, void *dev_id) @@ -120,6 +133,13 @@ static const struct hantro_codec_ops stm32mp25_venc_codec_ops[] = { .reset = stm32mp25_venc_reset, .done = hantro_h1_jpeg_enc_done, }, + [HANTRO_MODE_VP8_ENC] = { + .run = hantro_h1_vp8_enc_run, + .reset = stm32mp25_venc_reset, + .init = hantro_vp8_enc_init, + .done = hantro_h1_vp8_enc_done, + .exit = hantro_vp8_enc_exit, + }, }; /* @@ -137,7 +157,7 @@ static const char * const stm32mp25_venc_clk_names[] = { const struct hantro_variant stm32mp25_venc_variant = { .enc_fmts = stm32mp25_venc_fmts, .num_enc_fmts = ARRAY_SIZE(stm32mp25_venc_fmts), - .codec = HANTRO_JPEG_ENCODER, + .codec = HANTRO_JPEG_ENCODER | HANTRO_VP8_ENCODER, .codec_ops = stm32mp25_venc_codec_ops, .irqs = stm32mp25_venc_irqs, .num_irqs = ARRAY_SIZE(stm32mp25_venc_irqs),