From patchwork Wed Jan 10 14:14:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Stephan X-Patchwork-Id: 13516224 Received: from mail-wr1-f53.google.com (mail-wr1-f53.google.com [209.85.221.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 514E94CE11 for ; Wed, 10 Jan 2024 14:14:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="2RB5We6q" Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-3368b9bbeb4so4107623f8f.2 for ; Wed, 10 Jan 2024 06:14:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1704896095; x=1705500895; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=YxtigJcFkwv9zaWo7GK9kjRZG8IVTttxdOGtGMzq6k0=; b=2RB5We6qg9zdjTzpzDLc75zmvq3FZVy9rOXDqu0Npxi1dXb392uOK3X4/bIfabGkzY 4JS/2jsuDfyowQNXZH9/Me9tB4QumuWWTibYhYq2i86RpOhYEP2iAHBXGINLFaFaOOhK jS2IUsLubxb6fwce1yeBY4/Q3AO1n22inNdffXRyG5Cdhv2b3DVXT90obZBoy5dzMH6x 5BXP63W5MzbrNv+AzZpRRTjpolFeYEWF6VplURmaCDWLtakdpDDPRMzo707/MB2XPw+o 7oeSDY1aLSdTzMexx0Xmntg3p9JfN79LDqRWijWaZv2b0LkX+1DOlTeNiDFP+UA96pfr gAfw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704896095; x=1705500895; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=YxtigJcFkwv9zaWo7GK9kjRZG8IVTttxdOGtGMzq6k0=; b=fcw78hqvh9TzmEHTzijRLlMhOZOZXzF8hDAvdFoqnNL+xiFVpnLETu1z6aAK8VwJXR St+BMx6FpHR8M9U44ozJKcMwlQLtkNn7QDXKxSM2fia45UOREexkckbsEselkIE0PeBX HmxdM+4yKbVeR7L/+CESJJ4ZjWCHBY3pM5hlVXiCSb2WOJr8aGgWF/4TTMJcdU39uZU2 /I0Tt/iHCXtt7Qw1YSCRul6r6HtQdrMnoRt2XiLPi/o9BBkeg6ODiTrIYOPtuTKhvt3E scNjhJATTOvz0kk5i1LAj6zArmPUP1WpoXqBHQj9eoch6x5Hrypk4jV4rfMpBMsaX/tR KaGA== X-Gm-Message-State: AOJu0YzwfnukmLQ0CG2eFtIkD58zdsLazYV1D/cUPSPfeJ8bQQQfegv8 NkbjWwtk0svLGKl0xmzTbDZKqJJftPLkIA== X-Google-Smtp-Source: AGHT+IG/gRhIPiGPqyamkimIkReGcw0IBFDLM3nG6+THKuTuyI62b0qDYD3Si8C1sYPA5JMHsQDEdQ== X-Received: by 2002:a05:600c:4ecc:b0:40d:9377:faff with SMTP id g12-20020a05600c4ecc00b0040d9377faffmr327887wmq.189.1704896095738; Wed, 10 Jan 2024 06:14:55 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:55f:21e0:9e19:4376:dea6:dbfa]) by smtp.gmail.com with ESMTPSA id j17-20020a05600c1c1100b0040c46719966sm2363890wms.25.2024.01.10.06.14.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jan 2024 06:14:55 -0800 (PST) From: Julien Stephan To: Cc: Julien Stephan , Andy Hsieh , AngeloGioacchino Del Regno , Conor Dooley , devicetree@vger.kernel.org, Florian Sylvestre , Krzysztof Kozlowski , Laurent Pinchart , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-media@vger.kernel.org, Louis Kuo , Matthias Brugger , Mauro Carvalho Chehab , Paul Elder , Phi-bang Nguyen , Rob Herring Subject: [PATCH v4 5/5] arm64: dts: mediatek: mt8365: Add support for camera Date: Wed, 10 Jan 2024 15:14:42 +0100 Message-ID: <20240110141443.364655-6-jstephan@baylibre.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240110141443.364655-1-jstephan@baylibre.com> References: <20240110141443.364655-1-jstephan@baylibre.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add base support for cameras for mt8365 platforms. This requires nodes for the sensor interface, camsv, and CSI receivers. Signed-off-by: Julien Stephan Reviewed-by: Laurent Pinchart --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 128 +++++++++++++++++++++++ 1 file changed, 128 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index 24581f7410aa..9059b2f83b83 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include / { compatible = "mediatek,mt8365"; @@ -703,6 +704,133 @@ ethernet: ethernet@112a0000 { status = "disabled"; }; + camsv1: camsv@15050000 { + compatible = "mediatek,mt8365-camsv"; + reg = <0 0x15050000 0 0x0040>, + <0 0x15050208 0 0x0020>, + <0 0x15050400 0 0x0100>; + interrupts = ; + clocks = <&camsys CLK_CAM>, + <&camsys CLK_CAMTG>, + <&camsys CLK_CAMSV0>; + clock-names = "cam", "camtg", "camsv"; + iommus = <&iommu M4U_PORT_CAM_IMGO>; + mediatek,larb = <&larb2>; + power-domains = <&spm MT8365_POWER_DOMAIN_CAM>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + camsv1_endpoint: endpoint { + remote-endpoint = + <&seninf_camsv1_endpoint>; + }; + }; + }; + }; + + camsv2: camsv@15050800 { + compatible = "mediatek,mt8365-camsv"; + reg = <0 0x15050800 0 0x0040>, + <0 0x15050228 0 0x0020>, + <0 0x15050C00 0 0x0100>; + interrupts = ; + clocks = <&camsys CLK_CAM>, + <&camsys CLK_CAMTG>, + <&camsys CLK_CAMSV1>; + clock-names = "cam", "camtg", "camsv"; + iommus = <&iommu M4U_PORT_CAM_IMGO>; + + mediatek,larb = <&larb2>; + power-domains = <&spm MT8365_POWER_DOMAIN_CAM>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + camsv2_endpoint: endpoint { + remote-endpoint = + <&seninf_camsv2_endpoint>; + }; + }; + }; + }; + + seninf: seninf@15040000 { + compatible = "mediatek,mt8365-seninf"; + reg = <0 0x15040000 0 0x6000>; + interrupts = ; + clocks = <&camsys CLK_CAM_SENIF>, + <&topckgen CLK_TOP_SENIF_SEL>; + clock-names = "camsys", "top_mux"; + + power-domains = <&spm MT8365_POWER_DOMAIN_CAM>; + + phys = <&mipi_csi0 PHY_TYPE_DPHY>, <&mipi_csi1>; + phy-names = "csi0", "csi1"; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + }; + + port@1 { + reg = <1>; + }; + + port@2 { + reg = <2>; + }; + + port@3 { + reg = <3>; + }; + + port@4 { + reg = <4>; + seninf_camsv1_endpoint: endpoint { + remote-endpoint = + <&camsv1_endpoint>; + }; + }; + + port@5 { + reg = <5>; + seninf_camsv2_endpoint: endpoint { + remote-endpoint = + <&camsv2_endpoint>; + }; + }; + }; + }; + + mipi_csi0: mipi-csi0@11c10000 { + compatible = "mediatek,mt8365-csi-rx"; + reg = <0 0x11C10000 0 0x2000>; + status = "disabled"; + num-lanes = <4>; + #phy-cells = <1>; + }; + + mipi_csi1: mipi-csi1@11c12000 { + compatible = "mediatek,mt8365-csi-rx"; + reg = <0 0x11C12000 0 0x2000>; + phy-type = ; + status = "disabled"; + num-lanes = <4>; + #phy-cells = <0>; + }; + u3phy: t-phy@11cc0000 { compatible = "mediatek,mt8365-tphy", "mediatek,generic-tphy-v2"; #address-cells = <1>;