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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id 4fb4d7f45d1cf-5a69c1f56a0sm1982126a12.64.2024.07.21.23.53.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 21 Jul 2024 23:53:51 -0700 (PDT) From: Alexandre Mergnat Date: Mon, 22 Jul 2024 08:53:38 +0200 Subject: [PATCH v7 09/16] ASoC: mediatek: mt8365: Add PCM DAI support Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240226-audio-i350-v7-9-6518d953a141@baylibre.com> References: <20240226-audio-i350-v7-0-6518d953a141@baylibre.com> In-Reply-To: <20240226-audio-i350-v7-0-6518d953a141@baylibre.com> To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Lee Jones , Flora Fu , Jaroslav Kysela , Takashi Iwai , Sumit Semwal , =?utf-8?q?Christian_K=C3=B6nig?= , Catalin Marinas , Will Deacon , Rob Herring , Krzysztof Kozlowski Cc: linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, linaro-mm-sig@lists.linaro.org, Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=8324; i=amergnat@baylibre.com; h=from:subject:message-id; bh=JRfz/kV+DRSeGgY1Z9RwX0i9Jk3fWwDrXob0FOGSr3A=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBmngHxIVJ0ffENFcAVvScVKd5s3gJHA7xZXstJnpMX pfr+/C2JAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZp4B8QAKCRArRkmdfjHURYCMEA CN9TandmpcC/kiZwATKGvwWLuffpe33nbsSP7fpBWETlQP8f5fBZQoEICq+Y6yCTm/+0A+MvvmrEpA 4EOYqA9YJrVWG6F5U+DJJ8P8n7V6x2O5iW+gkbXev+Z11/potQFMB2S4gCF3cZcE18Rh9QLOCojlLQ HqeeF3ncPQHKW8tUsggyiUXxosfeaZVlZSdODg0V0uI+4YwopYyLY+ebZxPB/sELUSSFpC2ZaOTfTV EuHaMO+wD92EasmwZn2FLEnVKCfF0kO29ZsNrsvj5lGr3MOmPPHLCI/H6GEQuN3qRzSHckMLZukBOK 7dnSHdLQ9kNekMfLdZqVNhcJPmUT2/GnKJ3lTthtlesNBf2U9EGhcqKyijRICSgAiSPdKADlGD43jE Rfd+a3C6xPmr8iqxoIbe7Ct4MeMCZtK9utJP+YWc0mCOkstVgK4AjEpsoTYx1mp9M3K7n83o1p2AD7 iynKHjkpRhWNYf85lN+yQdxbH1GCNkVBJHGe6n9kFJCgr+9KOfdBRglM6KTwxKeu0UMsV6HU1UITX1 Q1iUQ+UbcbczhKSdd4/BVuUFRMi55BTRu5nr15qC9sA/7pAlUFPhh+z/2Ac0Nf4pWzteDZOLl5kZVJ 9KHn35ybU6HN4FZP/Thzhyc3+CgRpNyOB402HnSMFIaeVANipfs6eU96zIfA== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Add Pulse Code Modulation Device Audio Interface support for MT8365 SoC. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- sound/soc/mediatek/mt8365/mt8365-dai-pcm.c | 293 +++++++++++++++++++++++++++++ 1 file changed, 293 insertions(+) diff --git a/sound/soc/mediatek/mt8365/mt8365-dai-pcm.c b/sound/soc/mediatek/mt8365/mt8365-dai-pcm.c new file mode 100644 index 000000000000..f85ec07249c3 --- /dev/null +++ b/sound/soc/mediatek/mt8365/mt8365-dai-pcm.c @@ -0,0 +1,293 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * MediaTek 8365 ALSA SoC Audio DAI PCM Control + * + * Copyright (c) 2024 MediaTek Inc. + * Authors: Jia Zeng + * Alexandre Mergnat + */ + +#include +#include +#include +#include "mt8365-afe-clk.h" +#include "mt8365-afe-common.h" + +struct mt8365_pcm_intf_data { + bool slave_mode; + bool lrck_inv; + bool bck_inv; + unsigned int format; +}; + +/* DAI Drivers */ + +static void mt8365_dai_enable_pcm1(struct mtk_base_afe *afe) +{ + regmap_update_bits(afe->regmap, PCM_INTF_CON1, + PCM_INTF_CON1_EN, PCM_INTF_CON1_EN); +} + +static void mt8365_dai_disable_pcm1(struct mtk_base_afe *afe) +{ + regmap_update_bits(afe->regmap, PCM_INTF_CON1, + PCM_INTF_CON1_EN, 0x0); +} + +static int mt8365_dai_configure_pcm1(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mt8365_pcm_intf_data *pcm_priv = afe_priv->dai_priv[MT8365_AFE_IO_PCM1]; + bool slave_mode = pcm_priv->slave_mode; + bool lrck_inv = pcm_priv->lrck_inv; + bool bck_inv = pcm_priv->bck_inv; + unsigned int fmt = pcm_priv->format; + unsigned int bit_width = dai->sample_bits; + unsigned int val = 0; + + if (!slave_mode) { + val |= PCM_INTF_CON1_MASTER_MODE | + PCM_INTF_CON1_BYPASS_ASRC; + + if (lrck_inv) + val |= PCM_INTF_CON1_SYNC_OUT_INV; + if (bck_inv) + val |= PCM_INTF_CON1_BCLK_OUT_INV; + } else { + val |= PCM_INTF_CON1_SLAVE_MODE; + + if (lrck_inv) + val |= PCM_INTF_CON1_SYNC_IN_INV; + if (bck_inv) + val |= PCM_INTF_CON1_BCLK_IN_INV; + + /* TODO: add asrc setting */ + } + + val |= FIELD_PREP(PCM_INTF_CON1_FORMAT_MASK, fmt); + + if (fmt == MT8365_PCM_FORMAT_PCMA || + fmt == MT8365_PCM_FORMAT_PCMB) + val |= PCM_INTF_CON1_SYNC_LEN(1); + else + val |= PCM_INTF_CON1_SYNC_LEN(bit_width); + + switch (substream->runtime->rate) { + case 48000: + val |= PCM_INTF_CON1_FS_48K; + break; + case 32000: + val |= PCM_INTF_CON1_FS_32K; + break; + case 16000: + val |= PCM_INTF_CON1_FS_16K; + break; + case 8000: + val |= PCM_INTF_CON1_FS_8K; + break; + default: + return -EINVAL; + } + + if (bit_width > 16) + val |= PCM_INTF_CON1_24BIT | PCM_INTF_CON1_64BCK; + else + val |= PCM_INTF_CON1_16BIT | PCM_INTF_CON1_32BCK; + + val |= PCM_INTF_CON1_EXT_MODEM; + + regmap_update_bits(afe->regmap, PCM_INTF_CON1, + PCM_INTF_CON1_CONFIG_MASK, val); + + return 0; +} + +static int mt8365_dai_pcm1_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + + if (snd_soc_dai_active(dai)) + return 0; + + mt8365_afe_enable_main_clk(afe); + + return 0; +} + +static void mt8365_dai_pcm1_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + + if (snd_soc_dai_active(dai)) + return; + + mt8365_dai_disable_pcm1(afe); + mt8365_afe_disable_main_clk(afe); +} + +static int mt8365_dai_pcm1_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + int ret; + + if ((snd_soc_dai_stream_active(dai, SNDRV_PCM_STREAM_PLAYBACK) + + snd_soc_dai_stream_active(dai, SNDRV_PCM_STREAM_CAPTURE)) > 1) { + dev_info(afe->dev, "%s '%s' active(%u-%u) already\n", + __func__, snd_pcm_stream_str(substream), + snd_soc_dai_stream_active(dai, SNDRV_PCM_STREAM_PLAYBACK), + snd_soc_dai_stream_active(dai, SNDRV_PCM_STREAM_CAPTURE)); + return 0; + } + + ret = mt8365_dai_configure_pcm1(substream, dai); + if (ret) + return ret; + + mt8365_dai_enable_pcm1(afe); + + return 0; +} + +static int mt8365_dai_pcm1_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mt8365_pcm_intf_data *pcm_priv = afe_priv->dai_priv[MT8365_AFE_IO_PCM1]; + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + pcm_priv->format = MT8365_PCM_FORMAT_I2S; + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + pcm_priv->bck_inv = false; + pcm_priv->lrck_inv = false; + break; + case SND_SOC_DAIFMT_NB_IF: + pcm_priv->bck_inv = false; + pcm_priv->lrck_inv = true; + break; + case SND_SOC_DAIFMT_IB_NF: + pcm_priv->bck_inv = true; + pcm_priv->lrck_inv = false; + break; + case SND_SOC_DAIFMT_IB_IF: + pcm_priv->bck_inv = true; + pcm_priv->lrck_inv = true; + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + pcm_priv->slave_mode = true; + break; + case SND_SOC_DAIFMT_CBS_CFS: + pcm_priv->slave_mode = false; + break; + default: + return -EINVAL; + } + + return 0; +} + +static const struct snd_soc_dai_ops mt8365_dai_pcm1_ops = { + .startup = mt8365_dai_pcm1_startup, + .shutdown = mt8365_dai_pcm1_shutdown, + .prepare = mt8365_dai_pcm1_prepare, + .set_fmt = mt8365_dai_pcm1_set_fmt, +}; + +static struct snd_soc_dai_driver mtk_dai_pcm_driver[] = { + { + .name = "PCM1", + .id = MT8365_AFE_IO_PCM1, + .playback = { + .stream_name = "PCM1 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000 | + SNDRV_PCM_RATE_16000 | + SNDRV_PCM_RATE_32000 | + SNDRV_PCM_RATE_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .capture = { + .stream_name = "PCM1 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000 | + SNDRV_PCM_RATE_16000 | + SNDRV_PCM_RATE_32000 | + SNDRV_PCM_RATE_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &mt8365_dai_pcm1_ops, + .symmetric_rate = 1, + .symmetric_sample_bits = 1, + } +}; + +/* DAI widget */ + +static const struct snd_soc_dapm_widget mtk_dai_pcm_widgets[] = { + SND_SOC_DAPM_OUTPUT("PCM1 Out"), + SND_SOC_DAPM_INPUT("PCM1 In"), +}; + +/* DAI route */ + +static const struct snd_soc_dapm_route mtk_dai_pcm_routes[] = { + {"PCM1 Playback", NULL, "O07"}, + {"PCM1 Playback", NULL, "O08"}, + {"PCM1 Out", NULL, "PCM1 Playback"}, + + {"I09", NULL, "PCM1 Capture"}, + {"I22", NULL, "PCM1 Capture"}, + {"PCM1 Capture", NULL, "PCM1 In"}, +}; + +static int init_pcmif_priv_data(struct mtk_base_afe *afe) +{ + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mt8365_pcm_intf_data *pcmif_priv; + + pcmif_priv = devm_kzalloc(afe->dev, sizeof(struct mt8365_pcm_intf_data), + GFP_KERNEL); + if (!pcmif_priv) + return -ENOMEM; + + afe_priv->dai_priv[MT8365_AFE_IO_PCM1] = pcmif_priv; + return 0; +} + +int mt8365_dai_pcm_register(struct mtk_base_afe *afe) +{ + struct mtk_base_afe_dai *dai; + + dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL); + if (!dai) + return -ENOMEM; + + list_add(&dai->list, &afe->sub_dais); + dai->dai_drivers = mtk_dai_pcm_driver; + dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_pcm_driver); + dai->dapm_widgets = mtk_dai_pcm_widgets; + dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_pcm_widgets); + dai->dapm_routes = mtk_dai_pcm_routes; + dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_pcm_routes); + return init_pcmif_priv_data(afe); +}