From patchwork Wed Mar 13 07:25:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sakari Ailus X-Patchwork-Id: 13591090 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A800E171BA for ; Wed, 13 Mar 2024 07:26:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710314763; cv=none; b=G8JgJrMnikGRkb4XxjgXAH2iIxHV0cqwzmzy1ZVOM6pmnQ2M9fJV154AakbD1JHLAyTkAarcR2aDZ0CDjNUeVW4wsd0BXpW1QsQqAQfpSHfwvPJYoCqFjFqO+QmKvu1k2RHwwlqNB5cEX8pVJ9PQeiP840p8jk5aZnPwiArwREk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710314763; c=relaxed/simple; bh=6khOeog9+eZvda/b6r6siO+S2X7A7wJEN/T2QshNqso=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=PLoz1LbVBNW1Lmc1XNZrqVprT43SwWgzayjZmkghMjcZh3v9qKP/lINTAdFk4OT6hObkTqFhBn24U3EgDq+DOBPhXARXhczd0gWcPSsq587GaL6BX8CSh7txc8/jEZm/e6COVQXBJtYeN4FJCfq7mNcGrx1QGQxVtpztoUk/aG0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=eJVPaMB/; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="eJVPaMB/" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1710314761; x=1741850761; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6khOeog9+eZvda/b6r6siO+S2X7A7wJEN/T2QshNqso=; b=eJVPaMB/S9yrg5ygu2TqSUvjWSZrzjdYUsiaMXIUI+IINkKPUAVfKT45 RSlJ2nHwzpW0mvFBDSBHS6YyBnRk5SWf9GEsNfpipwDk99lhbqkWaAABL oaGyYHYxCQZrpzz5xcXX0PvxqQbNHmlbVlkYxbZNsCVVuBAYbB/o41IAv k2kvDkQVjdGPgcvergY0VitI8QqeMsLzIBP038AserCV0roj1aTO4iXVQ GqZpdNN7DGrlQcKxIRg3XMcfiMK198pBSQzt+kI7x2sOLCxWBgO1lEzKB CHJWCWQUTZVjP1+yUvo3cqpm2u6sq0sDrQLnvrfd+73bmgtYIBC9Z54gp w==; X-IronPort-AV: E=McAfee;i="6600,9927,11011"; a="22575635" X-IronPort-AV: E=Sophos;i="6.07,119,1708416000"; d="scan'208";a="22575635" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2024 00:25:55 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,119,1708416000"; d="scan'208";a="42816471" Received: from turnipsi.fi.intel.com (HELO kekkonen.fi.intel.com) ([10.237.72.44]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Mar 2024 00:25:53 -0700 Received: from svinhufvud.ger.corp.intel.com (localhost [IPv6:::1]) by kekkonen.fi.intel.com (Postfix) with ESMTP id B208D1201C3; Wed, 13 Mar 2024 09:25:49 +0200 (EET) From: Sakari Ailus To: linux-media@vger.kernel.org Cc: Laurent Pinchart , tomi.valkeinen@ideasonboard.com, bingbu.cao@intel.com, hongju.wang@intel.com, hverkuil@xs4all.nl, Andrey Konovalov , Jacopo Mondi , Dmitry Perchanov , "Ng, Khai Wen" , Alain Volmat Subject: [PATCH v8 22/38] media: ccs: Support frame descriptors Date: Wed, 13 Mar 2024 09:25:00 +0200 Message-Id: <20240313072516.241106-23-sakari.ailus@linux.intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240313072516.241106-1-sakari.ailus@linux.intel.com> References: <20240313072516.241106-1-sakari.ailus@linux.intel.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Provide information on the frame layout using frame descriptors. Signed-off-by: Sakari Ailus Reviewed-by: Julien Massot --- drivers/media/i2c/ccs/ccs-core.c | 60 +++++++++++++++++++++++++++++++ drivers/media/i2c/ccs/ccs-quirk.h | 7 ++++ drivers/media/i2c/ccs/ccs.h | 4 +++ 3 files changed, 71 insertions(+) diff --git a/drivers/media/i2c/ccs/ccs-core.c b/drivers/media/i2c/ccs/ccs-core.c index 0efbc63534bc..9cc2080b73ec 100644 --- a/drivers/media/i2c/ccs/ccs-core.c +++ b/drivers/media/i2c/ccs/ccs-core.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include @@ -245,6 +246,33 @@ static int ccs_read_all_limits(struct ccs_sensor *sensor) return ret; } +static u8 ccs_mipi_csi2_data_type(unsigned int bpp) +{ + switch (bpp) { + case 6: + return MIPI_CSI2_DT_RAW6; + case 7: + return MIPI_CSI2_DT_RAW7; + case 8: + return MIPI_CSI2_DT_RAW8; + case 10: + return MIPI_CSI2_DT_RAW10; + case 12: + return MIPI_CSI2_DT_RAW12; + case 14: + return MIPI_CSI2_DT_RAW14; + case 16: + return MIPI_CSI2_DT_RAW16; + case 20: + return MIPI_CSI2_DT_RAW20; + case 24: + return MIPI_CSI2_DT_RAW24; + default: + WARN_ON(1); + return 0; + } +} + static int ccs_read_frame_fmt(struct ccs_sensor *sensor) { struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd); @@ -2632,6 +2660,37 @@ static int ccs_set_selection(struct v4l2_subdev *subdev, return ret; } +static int ccs_get_frame_desc(struct v4l2_subdev *subdev, unsigned int pad, + struct v4l2_mbus_frame_desc *desc) +{ + struct ccs_sensor *sensor = to_ccs_sensor(subdev); + struct v4l2_mbus_frame_desc_entry *entry = desc->entry; + + if (ccs_has_quirk(sensor, frame_desc)) + return ccs_call_quirk(sensor, frame_desc, desc); + + switch (sensor->hwcfg.csi_signalling_mode) { + case CCS_CSI_SIGNALING_MODE_CSI_2_DPHY: + case CCS_CSI_SIGNALING_MODE_CSI_2_CPHY: + desc->type = V4L2_MBUS_FRAME_DESC_TYPE_CSI2; + break; + default: + /* FIXME: CCP2 support */ + return -EINVAL; + } + + entry->pixelcode = sensor->csi_format->code; + entry->stream = CCS_STREAM_PIXEL; + entry->bus.csi2.dt = + sensor->csi_format->width == sensor->csi_format->compressed ? + ccs_mipi_csi2_data_type(sensor->csi_format->compressed) : + CCS_DEFAULT_COMPRESSED_DT; + entry++; + desc->num_entries++; + + return 0; +} + static int ccs_get_skip_frames(struct v4l2_subdev *subdev, u32 *frames) { struct ccs_sensor *sensor = to_ccs_sensor(subdev); @@ -3054,6 +3113,7 @@ static const struct v4l2_subdev_pad_ops ccs_pad_ops = { .set_selection = ccs_set_selection, .enable_streams = ccs_enable_streams, .disable_streams = ccs_disable_streams, + .get_frame_desc = ccs_get_frame_desc, }; static const struct v4l2_subdev_sensor_ops ccs_sensor_ops = { diff --git a/drivers/media/i2c/ccs/ccs-quirk.h b/drivers/media/i2c/ccs/ccs-quirk.h index 392c97109617..3e1d9eaa33fa 100644 --- a/drivers/media/i2c/ccs/ccs-quirk.h +++ b/drivers/media/i2c/ccs/ccs-quirk.h @@ -36,6 +36,7 @@ struct ccs_sensor; * access may be done by the caller (default read * value is zero), else negative error code on error * @flags: Quirk flags + * @frame_desc: Obtain the frame descriptor */ struct ccs_quirk { int (*limits)(struct ccs_sensor *sensor); @@ -46,6 +47,8 @@ struct ccs_quirk { int (*init)(struct ccs_sensor *sensor); int (*reg_access)(struct ccs_sensor *sensor, bool write, u32 *reg, u32 *val); + int (*frame_desc)(struct ccs_sensor *sensor, + struct v4l2_mbus_frame_desc *desc); unsigned long flags; }; @@ -62,6 +65,10 @@ struct ccs_reg_8 { .val = _val, \ } +#define ccs_has_quirk(sensor, _quirk) \ + ((sensor)->minfo.quirk && \ + (sensor)->minfo.quirk->_quirk) + #define ccs_call_quirk(sensor, _quirk, ...) \ ((sensor)->minfo.quirk && \ (sensor)->minfo.quirk->_quirk ? \ diff --git a/drivers/media/i2c/ccs/ccs.h b/drivers/media/i2c/ccs/ccs.h index 4725e6eca8d0..adb152366ea2 100644 --- a/drivers/media/i2c/ccs/ccs.h +++ b/drivers/media/i2c/ccs/ccs.h @@ -46,6 +46,8 @@ #define CCS_COLOUR_COMPONENTS 4 +#define CCS_DEFAULT_COMPRESSED_DT 0x30 + #define SMIAPP_NAME "smiapp" #define CCS_NAME "ccs" @@ -175,6 +177,8 @@ struct ccs_csi_data_format { #define CCS_PAD_SRC 1 #define CCS_PADS 2 +#define CCS_STREAM_PIXEL 0 + struct ccs_binning_subtype { u8 horizontal:4; u8 vertical:4;