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Thu, 21 Mar 2024 15:44:10 -0500 From: Anatoliy Klymenko Date: Thu, 21 Mar 2024 13:43:47 -0700 Subject: [PATCH v3 9/9] drm: xlnx: Intoduce TPG CRTC driver Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240321-dp-live-fmt-v3-9-d5090d796b7e@amd.com> References: <20240321-dp-live-fmt-v3-0-d5090d796b7e@amd.com> In-Reply-To: <20240321-dp-live-fmt-v3-0-d5090d796b7e@amd.com> To: Laurent Pinchart , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Michal Simek , Andrzej Hajda , Neil Armstrong , Robert Foss , Jonas Karlman , Jernej Skrabec , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mauro Carvalho Chehab CC: Tomi Valkeinen , , , , , , Anatoliy Klymenko X-Mailer: b4 0.13.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B075:EE_|PH7PR12MB6980:EE_ X-MS-Office365-Filtering-Correlation-Id: b333e939-0510-436e-8325-08dc49e7ad02 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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REFERENCE ONLY. Add CRTC driver based on AMD/Xilinx Video Test Pattern Generator IP. TPG based FPGA design represents minimalistic harness useful for testing links between FPGA based CRTC and external DRM encoders, both FPGA and hardened IP based. Add driver for AMD/Xilinx Video Timing Controller. The VTC, working in generator mode, suplements TPG with video timing signals. Signed-off-by: Anatoliy Klymenko --- drivers/gpu/drm/xlnx/Kconfig | 21 + drivers/gpu/drm/xlnx/Makefile | 4 + drivers/gpu/drm/xlnx/xlnx_tpg.c | 846 +++++++++++++++++++++++++++++++++++ drivers/gpu/drm/xlnx/xlnx_vtc.c | 452 +++++++++++++++++++ drivers/gpu/drm/xlnx/xlnx_vtc.h | 101 +++++ drivers/gpu/drm/xlnx/xlnx_vtc_list.c | 160 +++++++ 6 files changed, 1584 insertions(+) diff --git a/drivers/gpu/drm/xlnx/Kconfig b/drivers/gpu/drm/xlnx/Kconfig index 68ee897de9d7..c40e98c1a5e6 100644 --- a/drivers/gpu/drm/xlnx/Kconfig +++ b/drivers/gpu/drm/xlnx/Kconfig @@ -15,3 +15,24 @@ config DRM_ZYNQMP_DPSUB This is a DRM/KMS driver for ZynqMP DisplayPort controller. Choose this option if you have a Xilinx ZynqMP SoC with DisplayPort subsystem. + +config DRM_XLNX_BRIDGE_VTC + bool "Xilinx DRM VTC Driver" + depends on OF + help + DRM brige driver for Xilinx Video Timing Controller. Choose + this option to make VTC a part of the CRTC in display pipeline. + Currently the support is added to the Xilinx Video Mixer and + Xilinx PL display CRTC drivers. This driver provides ability + to generate timings through the bridge layer. + +config DRM_XLNX_TPG + bool "Xilinx DRM TPG Driver" + depends on DRM && OF + select DRM_XLNX_BRIDGE_VTC + select VIDEOMODE_HELPERS + help + CRTC driver based on AMD/Xilinx Test Pattern Generator IP. Choose + this driver to enable Test Pattern Generator CRTC. This driver + implements simplistic CRTC with the single plane and is perfect for + testing PL to PS and PL to PL display output pipelines. diff --git a/drivers/gpu/drm/xlnx/Makefile b/drivers/gpu/drm/xlnx/Makefile index ea1422a39502..26fb3ad21fa9 100644 --- a/drivers/gpu/drm/xlnx/Makefile +++ b/drivers/gpu/drm/xlnx/Makefile @@ -1,2 +1,6 @@ zynqmp-dpsub-y := zynqmp_disp.o zynqmp_dpsub.o zynqmp_dp.o zynqmp_kms.o obj-$(CONFIG_DRM_ZYNQMP_DPSUB) += zynqmp-dpsub.o +xlnx-tpg-objs := xlnx_tpg.o +xlnx-tpg-$(CONFIG_DRM_XLNX_BRIDGE_VTC) += xlnx_vtc_list.o +obj-$(CONFIG_DRM_XLNX_TPG) += xlnx-tpg.o +obj-$(CONFIG_DRM_XLNX_BRIDGE_VTC) += xlnx_vtc.o diff --git a/drivers/gpu/drm/xlnx/xlnx_tpg.c b/drivers/gpu/drm/xlnx/xlnx_tpg.c new file mode 100644 index 000000000000..3056bf278414 --- /dev/null +++ b/drivers/gpu/drm/xlnx/xlnx_tpg.c @@ -0,0 +1,846 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx logicore test pattern generator driver + * + * Copyright (C) 2024 Advanced Micro Devices, Inc. + * + * Author: Anatoliy Klymenko + * + * This driver introduces support for the test CRTC based on AMD/Xilinx + * Test Pattern Generator IP. The main goal of the driver is to enable + * simplistic FPGA design that could be used to test FPGA CRTC to external + * encoder IP connectivity. + * Reference: https://docs.xilinx.com/r/en-US/pg103-v-tpg + */ + +#include "xlnx_vtc.h" + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include