From patchwork Fri Sep 20 11:18:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keguang Zhang via B4 Relay X-Patchwork-Id: 13808478 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE0CE4A04; Fri, 20 Sep 2024 11:18:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726831137; cv=none; b=BYCIaJqtBCcU6X9PfqW8wQPliGcqBjNdlsrngx29b65CuzRO4lIvdRhFZzWn4pTDFqzsbq/8CbqWkEFui38fz8DW+LcmLhyNIvOXmGBmLzyht4tEHzUX6D2BJ5r2p5Br8GQdzhJ4v/KDcxwGTgMmRdt1sZNlHeDyC1YYxPR8tJs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726831137; c=relaxed/simple; bh=C2lALOA/HTQ48lrUu1YpJ0xMWmzNjp8V2vBH0myGipw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=TUpG7/aJsafuR3dm0M6+aTaREkumdxJPMx3JEyK8+k+JrNq9AP+CXW8JhcoF9VuSjaCZEfjzO50KdaihS6oxiHBJ6zVgsCIRl0LRTOYutM2R24DQUCNQfuEBpP7i47EZqVecifJFVV5HPYua2uGCc4foX/KN4PEfD2O0nKzzz60= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=bkGzEum8; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="bkGzEum8" Received: by smtp.kernel.org (Postfix) with ESMTPS id 4B3DEC4CECD; Fri, 20 Sep 2024 11:18:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726831137; bh=C2lALOA/HTQ48lrUu1YpJ0xMWmzNjp8V2vBH0myGipw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=bkGzEum8Dh2tQbhJp7/r81zrQ5Ip69k+iCWFdXYavp3JAS95xuGQW3xuKruq0IBBa 2IWV94m0OyiGyFk5GnUXtDxgGtyOuRGTOZaTy1dbrqDNiR4wQr0NCRlxP4BNQH9Ilu nSqc5NAypvYelvj6zeKDueaKdTdAG2OxkgsjRJWoWd9BPXTJuf2XLvbFEENn6SPZU8 3ieGpLOZCEVLnJmtp4OOrg396eT9Wve65DIx0SGezLIFYZfQVLRieXGRyAn53wfAaD 30LdkxhdbJPsrZ3DfXBsXciGYfFKMEfzgFwqFGYMfDt2H8GxucgumDUe3+HyIBvTXG xVwQnftzdfwEw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 376A4C78828; Fri, 20 Sep 2024 11:18:57 +0000 (UTC) From: Keguang Zhang via B4 Relay Date: Fri, 20 Sep 2024 19:18:53 +0800 Subject: [PATCH v9 1/2] dt-bindings: mtd: Add Loongson-1 NAND Controller Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240920-loongson1-nand-v9-1-9cc7b9345a03@gmail.com> References: <20240920-loongson1-nand-v9-0-9cc7b9345a03@gmail.com> In-Reply-To: <20240920-loongson1-nand-v9-0-9cc7b9345a03@gmail.com> To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org, Keguang Zhang X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1726831135; l=2835; i=keguang.zhang@gmail.com; s=20231129; h=from:subject:message-id; bh=i1pwL1d4KaKaOGZPu9rx8w563lpvdoqxRBgzicR1lOI=; b=QeHkXkgO5Eg/QwzrbNR3XgZSDKKgqtKm+u8VZCz4HixQ+3AE8kO3exJJBYn07mzkpSh7fKc9H lKzMOxrgsSJBruEBJlZkFsnPpQuKUJr+fyz9PZg+hoD32WkTUdOEziO X-Developer-Key: i=keguang.zhang@gmail.com; a=ed25519; pk=FMKGj/JgKll/MgClpNZ3frIIogsh5e5r8CeW2mr+WLs= X-Endpoint-Received: by B4 Relay for keguang.zhang@gmail.com/20231129 with auth_id=102 X-Original-From: Keguang Zhang Reply-To: keguang.zhang@gmail.com From: Keguang Zhang Add devicetree binding document for Loongson-1 NAND controller. Signed-off-by: Keguang Zhang Reviewed-by: Krzysztof Kozlowski --- Changes in v9: - Change the compatible to 'loongson,ls1*-nand-controller'. - Rename the file to loongson,ls1b-nand-controller.yaml - Some minor adjustments. Changes in v8: - Add a description part. - Adjust the compatible because the match data for ls1c-nfc differs from ls1b-nfc. - Mark 'nand-use-soft-ecc-engine' and 'nand-ecc-algo' as mandatory. - Delete the superfluous blank lines. Changes in v7: - rename the file to loongson,ls1b-nfc.yaml Changes in v6: - A newly added patch --- .../mtd/loongson,ls1b-nand-controller.yaml | 75 ++++++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/loongson,ls1b-nand-controller.yaml b/Documentation/devicetree/bindings/mtd/loongson,ls1b-nand-controller.yaml new file mode 100644 index 000000000000..308baf23221b --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/loongson,ls1b-nand-controller.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/loongson,ls1b-nand-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson-1 NAND Controller + +maintainers: + - Keguang Zhang + +description: + The Loongson-1 NAND controller abstracts all supported operations, + meaning it does not support low-level access to raw NAND flash chips. + Moreover, the controller is paired with the DMA engine to perform + READ and PROGRAM functions. + +allOf: + - $ref: nand-controller.yaml + +properties: + compatible: + oneOf: + - enum: + - loongson,ls1b-nand-controller + - loongson,ls1c-nand-controller + - items: + - enum: + - loongson,ls1a-nand-controller + - const: loongson,ls1b-nand-controller + + reg: + maxItems: 1 + + dmas: + maxItems: 1 + + dma-names: + const: rxtx + +patternProperties: + "^nand@[0-3]$": + type: object + $ref: raw-nand-chip.yaml + + required: + - nand-use-soft-ecc-engine + - nand-ecc-algo + + unevaluatedProperties: false + +required: + - compatible + - reg + - dmas + - dma-names + +unevaluatedProperties: false + +examples: + - | + nand-controller@1fe78000 { + compatible = "loongson,ls1b-nand-controller"; + reg = <0x1fe78000 0x40>; + dmas = <&dma 0>; + dma-names = "rxtx"; + #address-cells = <1>; + #size-cells = <0>; + + nand@0 { + reg = <0>; + nand-use-soft-ecc-engine; + nand-ecc-algo = "hamming"; + }; + };