From patchwork Sun Oct 20 22:13:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Apitzsch_via_B4_Relay?= X-Patchwork-Id: 13843315 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2036B197A81; Sun, 20 Oct 2024 22:14:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729462452; cv=none; b=a7RyA+ZQo3f9zbBrIwZw0cxRcmjOOASgXi+WVrQu9NDZfqMqnebklGeM84QUhVs9s1lpgh5RMjPR3Bby+5YbH6BEtZg7zCojNYPEhbAViO1FuuXcIxzwYRVDTbGPpcbmcYbFTwKFF6mGeXzL4HiJTunNJ13H45CJ9FrRE+I9v4Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729462452; c=relaxed/simple; bh=S8FfBXPNjjhlCI/HFOT2nHb83ABvho1ixjaatY2LUpc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Tt8cJ1Pf/S0lBhPZBxIXWwLlrDyUTTlN+ysj21mO40y/M++cNDDzu5RNSebD4FIbfR+c/FpT1hgXS82LXU8cIVUXtogAyfBkuWDtbV4kVgJ3lGsUcx3cEt8pbmWX312IMd1/nl1CdQrDftoR/e6jGfW6wl3Esn5se7l3vzho6d8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=TIQFpZyR; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="TIQFpZyR" Received: by smtp.kernel.org (Postfix) with ESMTPS id 9930AC4CECD; Sun, 20 Oct 2024 22:14:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1729462451; bh=S8FfBXPNjjhlCI/HFOT2nHb83ABvho1ixjaatY2LUpc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=TIQFpZyRPt+QsAbzdlJg+8UlTWm4iXFQeZXbWQslyh42AcsIYh/NAgTbU6z/I8x9f 3UHn7/ybQEOcMj5HUTTY5XWQU0BVC2+0RmvRvVgUAH79z0FU1IxuJO26jgh72oBGhl 7ZQydrFrOZre+nGobqkcVcFfj96ZZovqWwqbveP0nXy6T135OWFkMCpT4VplRPA6Dr ciXIjo2/oyA3jlcpiy0nWrGP9zYjQ2WqA9Xuss6I6WpYPHdom+7F24+8jZ4wFTm4X4 3LU8sR26+5gHz/Z/Rb8lfBHqdsGm2JZkcGPcyic5adHL/uuok7NcKYvp4rwxU2jGqD xE+xxIg6db65w== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 86B79D3C92D; Sun, 20 Oct 2024 22:14:11 +0000 (UTC) From: =?utf-8?q?Andr=C3=A9_Apitzsch_via_B4_Relay?= Date: Mon, 21 Oct 2024 00:13:21 +0200 Subject: [PATCH v2 01/13] media: i2c: imx214: Fix link frequency Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241021-imx214-v2-1-fbd23e99541e@apitzsch.eu> References: <20241021-imx214-v2-0-fbd23e99541e@apitzsch.eu> In-Reply-To: <20241021-imx214-v2-0-fbd23e99541e@apitzsch.eu> To: Ricardo Ribalda , Mauro Carvalho Chehab , Sakari Ailus Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, Dave Stevenson , =?utf-8?q?Andr=C3=A9_Apit?= =?utf-8?q?zsch?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1729462449; l=1541; i=git@apitzsch.eu; s=20240325; h=from:subject:message-id; bh=NluvLjOk7zpWEGYYj4MVNV0Nec5J7Y/DcA8dZZTRiIo=; b=BrgCerZaFunRpJUctNvXFFArnADMv/vNjc/D3ZpQZveBIg/+nfL1ilwXeiid0JffRzm2c8MWS EaPTRw8w1xRAj+9h6jXE0GW+1fhu/BSkI4Ia6q/hZAdIl81GSvWB1sI X-Developer-Key: i=git@apitzsch.eu; a=ed25519; pk=wxovcZRfvNYBMcTw4QFFtNEP4qv39gnBfnfyImXZxiU= X-Endpoint-Received: by B4 Relay for git@apitzsch.eu/20240325 with auth_id=142 X-Original-From: =?utf-8?q?Andr=C3=A9_Apitzsch?= Reply-To: git@apitzsch.eu From: André Apitzsch The driver defines IMX214_DEFAULT_LINK_FREQ 480000000, and then IMX214_DEFAULT_PIXEL_RATE ((IMX214_DEFAULT_LINK_FREQ * 8LL) / 10), which works out as 384MPix/s. (The 8 is 4 lanes and DDR.) Parsing the PLL registers with the defined 24MHz input. We're in single PLL mode, so MIPI frequency is directly linked to pixel rate. VTCK ends up being 1200MHz, and VTPXCK and OPPXCK both are 120MHz. Section 5.3 "Frame rate calculation formula" says "Pixel rate [pixels/s] = VTPXCK [MHz] * 4", so 120 * 4 = 480MPix/s, which basically agrees with my number above. 3.1.4. MIPI global timing setting says "Output bitrate = OPPXCK * reg 0x113[7:0]", so 120MHz * 10, or 1200Mbit/s. That would be a link frequency of 600MHz due to DDR. That also matches to 480MPix/s * 10bpp / 4 lanes / 2 for DDR. Signed-off-by: André Apitzsch --- drivers/media/i2c/imx214.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/i2c/imx214.c b/drivers/media/i2c/imx214.c index 4962cfe7c83d62425aeccb46a400fa93146f14ea..5d411452d342fdb177619cd1c9fd9650d31089bb 100644 --- a/drivers/media/i2c/imx214.c +++ b/drivers/media/i2c/imx214.c @@ -24,7 +24,7 @@ #define IMX214_MODE_STREAMING 0x01 #define IMX214_DEFAULT_CLK_FREQ 24000000 -#define IMX214_DEFAULT_LINK_FREQ 480000000 +#define IMX214_DEFAULT_LINK_FREQ 600000000 #define IMX214_DEFAULT_PIXEL_RATE ((IMX214_DEFAULT_LINK_FREQ * 8LL) / 10) #define IMX214_FPS 30 #define IMX214_MBUS_CODE MEDIA_BUS_FMT_SRGGB10_1X10