| Message ID | 20241112-add-venus-for-qcs615-v2-1-e67947f957af@quicinc.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | media: venus: enable venus on qcs615 | expand |
On Tue, 12 Nov 2024 17:17:57 +0530, Renjiang Han wrote: > Add support for Qualcomm video acceleration hardware used for video > stream decoding and encoding on QCOM QCS615. > > Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com> > --- > .../bindings/media/qcom,qcs615-venus.yaml | 181 +++++++++++++++++++++ > 1 file changed, 181 insertions(+) > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: Documentation/devicetree/bindings/media/qcom,qcs615-venus.example.dts:25:18: fatal error: dt-bindings/clock/qcom,qcs615-videocc.h: No such file or directory 25 | #include <dt-bindings/clock/qcom,qcs615-videocc.h> | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. make[2]: *** [scripts/Makefile.dtbs:129: Documentation/devicetree/bindings/media/qcom,qcs615-venus.example.dtb] Error 1 make[2]: *** Waiting for unfinished jobs.... make[1]: *** [/builds/robherring/dt-review-ci/linux/Makefile:1442: dt_binding_check] Error 2 make: *** [Makefile:224: __sub-make] Error 2 doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20241112-add-venus-for-qcs615-v2-1-e67947f957af@quicinc.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
Hi @Rob Herring (Arm) Thanks for your reply. "dt-bindings/clock/qcom,qcs615-videocc.h" is added in https://lore.kernel.org/all/20241108-qcs615-mm-clockcontroller-v3-0-7d3b2d235fdf@quicinc.com/. I think this patch may not be included. Best Regards, Renjiang -----Original Message----- From: Rob Herring (Arm) <robh@kernel.org> Sent: Tuesday, November 12, 2024 9:27 PM To: Renjiang Han (QUIC) <quic_renjiang@quicinc.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org>; bryan.odonoghue@linaro.org; Krzysztof Kozlowski <krzk+dt@kernel.org>; devicetree@vger.kernel.org; Bjorn Andersson <andersson@kernel.org>; Conor Dooley <conor+dt@kernel.org>; linux-arm-msm@vger.kernel.org; Vikash Garodia (QUIC) <quic_vgarodia@quicinc.com>; linux-media@vger.kernel.org; Stanimir Varbanov <stanimir.k.varbanov@gmail.com>; linux-kernel@vger.kernel.org; Konrad Dybcio <konradybcio@kernel.org> Subject: Re: [PATCH v2 1/4] dt-bindings: qcom,qcs615-venus: document QCS615 venus On Tue, 12 Nov 2024 17:17:57 +0530, Renjiang Han wrote: > Add support for Qualcomm video acceleration hardware used for video > stream decoding and encoding on QCOM QCS615. > > Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com> > --- > .../bindings/media/qcom,qcs615-venus.yaml | 181 +++++++++++++++++++++ > 1 file changed, 181 insertions(+) > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: Documentation/devicetree/bindings/media/qcom,qcs615-venus.example.dts:25:18: fatal error: dt-bindings/clock/qcom,qcs615-videocc.h: No such file or directory 25 | #include <dt-bindings/clock/qcom,qcs615-videocc.h> | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. make[2]: *** [scripts/Makefile.dtbs:129: Documentation/devicetree/bindings/media/qcom,qcs615-venus.example.dtb] Error 1 make[2]: *** Waiting for unfinished jobs.... make[1]: *** [/builds/robherring/dt-review-ci/linux/Makefile:1442: dt_binding_check] Error 2 make: *** [Makefile:224: __sub-make] Error 2 doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20241112-add-venus-for-qcs615-v2-1-e67947f957af@quicinc.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On Tue, Nov 12, 2024 at 05:17:57PM +0530, Renjiang Han wrote: > Add support for Qualcomm video acceleration hardware used for video > stream decoding and encoding on QCOM QCS615. > > Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com> > --- > .../bindings/media/qcom,qcs615-venus.yaml | 181 +++++++++++++++++++++ > 1 file changed, 181 insertions(+) > > diff --git a/Documentation/devicetree/bindings/media/qcom,qcs615-venus.yaml b/Documentation/devicetree/bindings/media/qcom,qcs615-venus.yaml > new file mode 100644 > index 0000000000000000000000000000000000000000..a807f4c7e94c635ef1662971b687db9bdce1b74a > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/qcom,qcs615-venus.yaml > @@ -0,0 +1,181 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/media/qcom,qcs615-venus.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm QCS615 Venus video encode and decode accelerators > + > +maintainers: > + - Stanimir Varbanov <stanimir.k.varbanov@gmail.com> > + - Vikash Garodia <quic_vgarodia@quicinc.com> > + > +description: | Don't need '|' if no formatting. > + The Venus IP is a video encode and decode accelerator present > + on Qualcomm platforms > + > +allOf: > + - $ref: qcom,venus-common.yaml# > + > +properties: > + compatible: > + const: qcom,qcs615-venus > + > + power-domains: > + minItems: 2 > + maxItems: 3 > + > + power-domain-names: > + minItems: 2 > + items: > + - const: venus > + - const: vcodec0 > + - const: cx > + > + clocks: > + maxItems: 5 > + > + clock-names: > + items: > + - const: core > + - const: iface > + - const: bus > + - const: vcodec0_core > + - const: vcodec0_bus > + > + iommus: > + maxItems: 1 > + > + memory-region: > + maxItems: 1 > + > + interconnects: > + maxItems: 2 > + > + interconnect-names: > + items: > + - const: video-mem > + - const: cpu-cfg > + > + operating-points-v2: true blank line > + opp-table: > + type: object > + > + video-decoder: > + type: object > + > + properties: > + compatible: > + const: venus-decoder > + > + required: > + - compatible > + > + additionalProperties: false Put this before 'properties' for indented cases. > + > + video-encoder: > + type: object > + > + properties: > + compatible: > + const: venus-encoder > + > + required: > + - compatible > + > + additionalProperties: false > + > +required: > + - compatible > + - power-domain-names > + - iommus > + - video-decoder > + - video-encoder > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/clock/qcom,qcs615-videocc.h> > + #include <dt-bindings/interconnect/qcom,qcs615-rpmh.h> > + #include <dt-bindings/power/qcom,rpmhpd.h> > + > + venus: video-codec@aa00000 { > + compatible = "qcom,qcs615-venus"; > + reg = <0xaa00000 0x100000>; > + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; > + > + clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>, > + <&videocc VIDEO_CC_VENUS_AHB_CLK>, > + <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>, > + <&videocc VIDEO_CC_VCODEC0_CORE_CLK>, > + <&videocc VIDEO_CC_VCODEC0_AXI_CLK>; > + clock-names = "core", > + "iface", > + "bus", > + "vcodec0_core", > + "vcodec0_bus"; > + > + power-domains = <&videocc VENUS_GDSC>, > + <&videocc VCODEC0_GDSC>, > + <&rpmhpd RPMHPD_CX>; > + power-domain-names = "venus", > + "vcodec0", > + "cx"; > + > + operating-points-v2 = <&venus_opp_table>; > + > + interconnects = <&mmss_noc MASTER_VIDEO_P0 0 > + &mc_virt SLAVE_EBI1 0>, > + <&gem_noc MASTER_APPSS_PROC 0 > + &config_noc SLAVE_VENUS_CFG 0>; > + interconnect-names = "video-mem", > + "cpu-cfg"; > + > + iommus = <&apps_smmu 0xe40 0x20>; > + > + memory-region = <&pil_video_mem>; > + > + video-decoder { > + compatible = "venus-decoder"; > + }; > + > + video-encoder { > + compatible = "venus-encoder"; > + }; > + > + venus_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-133330000 { > + opp-hz = /bits/ 64 <133330000>; > + required-opps = <&rpmhpd_opp_low_svs>; > + }; > + > + opp-240000000 { > + opp-hz = /bits/ 64 <240000000>; > + required-opps = <&rpmhpd_opp_svs>; > + }; > + > + opp-300000000 { > + opp-hz = /bits/ 64 <300000000>; > + required-opps = <&rpmhpd_opp_svs_l1>; > + }; > + > + opp-380000000 { > + opp-hz = /bits/ 64 <380000000>; > + required-opps = <&rpmhpd_opp_nom>; > + }; > + > + opp-410000000 { > + opp-hz = /bits/ 64 <410000000>; > + required-opps = <&rpmhpd_opp_turbo>; > + }; > + > + opp-460000000 { > + opp-hz = /bits/ 64 <460000000>; > + required-opps = <&rpmhpd_opp_turbo_l1>; > + }; > + }; > + }; > > -- > 2.34.1 >
diff --git a/Documentation/devicetree/bindings/media/qcom,qcs615-venus.yaml b/Documentation/devicetree/bindings/media/qcom,qcs615-venus.yaml new file mode 100644 index 0000000000000000000000000000000000000000..a807f4c7e94c635ef1662971b687db9bdce1b74a --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,qcs615-venus.yaml @@ -0,0 +1,181 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,qcs615-venus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm QCS615 Venus video encode and decode accelerators + +maintainers: + - Stanimir Varbanov <stanimir.k.varbanov@gmail.com> + - Vikash Garodia <quic_vgarodia@quicinc.com> + +description: | + The Venus IP is a video encode and decode accelerator present + on Qualcomm platforms + +allOf: + - $ref: qcom,venus-common.yaml# + +properties: + compatible: + const: qcom,qcs615-venus + + power-domains: + minItems: 2 + maxItems: 3 + + power-domain-names: + minItems: 2 + items: + - const: venus + - const: vcodec0 + - const: cx + + clocks: + maxItems: 5 + + clock-names: + items: + - const: core + - const: iface + - const: bus + - const: vcodec0_core + - const: vcodec0_bus + + iommus: + maxItems: 1 + + memory-region: + maxItems: 1 + + interconnects: + maxItems: 2 + + interconnect-names: + items: + - const: video-mem + - const: cpu-cfg + + operating-points-v2: true + opp-table: + type: object + + video-decoder: + type: object + + properties: + compatible: + const: venus-decoder + + required: + - compatible + + additionalProperties: false + + video-encoder: + type: object + + properties: + compatible: + const: venus-encoder + + required: + - compatible + + additionalProperties: false + +required: + - compatible + - power-domain-names + - iommus + - video-decoder + - video-encoder + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/qcom,qcs615-videocc.h> + #include <dt-bindings/interconnect/qcom,qcs615-rpmh.h> + #include <dt-bindings/power/qcom,rpmhpd.h> + + venus: video-codec@aa00000 { + compatible = "qcom,qcs615-venus"; + reg = <0xaa00000 0x100000>; + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>, + <&videocc VIDEO_CC_VENUS_AHB_CLK>, + <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>, + <&videocc VIDEO_CC_VCODEC0_CORE_CLK>, + <&videocc VIDEO_CC_VCODEC0_AXI_CLK>; + clock-names = "core", + "iface", + "bus", + "vcodec0_core", + "vcodec0_bus"; + + power-domains = <&videocc VENUS_GDSC>, + <&videocc VCODEC0_GDSC>, + <&rpmhpd RPMHPD_CX>; + power-domain-names = "venus", + "vcodec0", + "cx"; + + operating-points-v2 = <&venus_opp_table>; + + interconnects = <&mmss_noc MASTER_VIDEO_P0 0 + &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 + &config_noc SLAVE_VENUS_CFG 0>; + interconnect-names = "video-mem", + "cpu-cfg"; + + iommus = <&apps_smmu 0xe40 0x20>; + + memory-region = <&pil_video_mem>; + + video-decoder { + compatible = "venus-decoder"; + }; + + video-encoder { + compatible = "venus-encoder"; + }; + + venus_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-133330000 { + opp-hz = /bits/ 64 <133330000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-240000000 { + opp-hz = /bits/ 64 <240000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-380000000 { + opp-hz = /bits/ 64 <380000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + + opp-410000000 { + opp-hz = /bits/ 64 <410000000>; + required-opps = <&rpmhpd_opp_turbo>; + }; + + opp-460000000 { + opp-hz = /bits/ 64 <460000000>; + required-opps = <&rpmhpd_opp_turbo_l1>; + }; + }; + };
Add support for Qualcomm video acceleration hardware used for video stream decoding and encoding on QCOM QCS615. Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com> --- .../bindings/media/qcom,qcs615-venus.yaml | 181 +++++++++++++++++++++ 1 file changed, 181 insertions(+)